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STM32H7B3AI 数据表(PDF) 85 Page - STMicroelectronics |
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STM32H7B3AI 数据表(HTML) 85 Page - STMicroelectronics |
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85 / 238 page  Symbol (1)(2) Parameter VOS0 VOS1 VOS2 VOS3 Unit fspdifrx_ker_ck MHz SPDIFRX1 280 225 160 88 fspi_ker_ck SPI[1:6] 280 225 160 88 flpuart_ker_ck LPUART1 140 112.5 80 44 fusart_ker_ck USART1/2/3/6/10 280 225 160 88 fuart_ker_ck UART4/5/7/8/9 280 225 160 88 fadp_clk USBOTG 48 48 48 48 fulpi_ck USB1ULPI 66 66 66 66 fadc_ker_ck ADC1/2 50 50 50 50 fdac_pclk DAC1/2 140 112.5 80 44 frtc_ker_ck RTC 1 1 1 1 1. Guaranteed by design. 2. The maximum kernel clock frequencies can be limited by the maximum peripheral clock frequency (refer each peripheral electrical characteristics). Table 24. Supply voltage and maximum frequency configuration Power scale VCORE source Max TJ (°C) Max frequency (MHz) Min VDD (V) VOS0 LDO/SMPS 105 280 1.71 VOS1 LDO/SMPS 130 225 1.62 VOS2 LDO/SMPS 130 160 1.62 VOS3 LDO/SMPS 130 88 1.62 SVOS4 LDO/SMPS 130 N/A 1.62 SVOS5 LDO/SMPS 130 N/A 1.62 STM32H7B3xI Operating conditions DS13139 - Rev 8 page 85/238 |
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