STM32H7B3AI datasheet(30/238 Pages) STMICROELECTRONICS

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Monotonic counter

3.37

Inter-integrated circuit interface (I2C)

The STM32H7B3xI embed four I2C interfaces.

The I2C bus interface handles communications between the microcontroller and the serial I2C bus. It controls all

I2C bus-specific sequencing, protocol, arbitration and timing.

The I2C peripheral supports:

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I2C-bus specification and user manual rev. 5 compatibility:

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Slave and master modes, multimaster capability

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Standard-mode (Sm), with a bit rate up to 100 kbit/s

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Fast-mode (Fm), with a bit rate up to 400 kbit/s

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Fast-mode Plus (Fm+), with a bit rate up to 1 Mbit/s and 20 mA output drive I/Os

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7-bit and 10-bit addressing mode, multiple 7-bit slave addresses

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Programmable setup and hold times

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Optional clock stretching

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System management bus (SMBus) specification rev 2.0 compatibility:

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Hardware PEC (packet error checking) generation and verification with ACK control

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Address resolution protocol (ARP) support

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SMBus alert

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Power system management protocol (PMBus®) specification rev 1.1 compatibility

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Independent clock: a choice of independent clock sources allowing the I2C communication speed to be

independent from the PCLK reprogramming.

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Wakeup from Stop mode on address match

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Programmable analog and digital noise filters

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1-byte buffer with DMA capability

3.38

Universal synchronous/asynchronous receiver transmitter (USART)

The STM32H7B3xI devices have five embedded universal synchronous receiver transmitters (USART1, USART2,

USART3, USART6 and USART10) and five universal asynchronous receiver transmitters (UART4, UART5,

UART7, UART8 and UART9). Refer to the table below for a summary of USARTx and UARTx features.

These interfaces provide asynchronous communication, IrDA SIR ENDEC support, multiprocessor

communication mode, single-wire half-duplex communication mode and have LIN Master/Slave capability. They

provide hardware management of the CTS and RTS signals, and RS485 Driver Enable. They are able to

communicate at speeds of up to 10Mbit/s.

USART1, USART2, USART3, USART6 and USART10 also provide Smartcard mode (ISO 7816 compliant) and

SPI-like communication capability.

The USARTs embed a Transmit FIFO (TXFIFO) and a Receive FIFO (RXFIFO). FIFO mode is enabled by

software and is disabled by default.

All USART have a clock domain independent from the CPU clock, allowing the USARTx to wake up the MCU

from Stop mode.The wakeup from Stop mode are programmable and can be done on:

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Start bit detection

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Any received data frame

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A specific programmed data frame

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Specific TXFIFO/RXFIFO status when FIFO mode is enabled.

All USART interfaces can be served by the DMA controller.

Table 5. USART features

X = supported.

USART modes/features

USART1/2/3/6/10

UART4/5/7/8/9

Hardware flow control for modem

STM32H7B3xI

Inter-integrated circuit interface (I2C)

DS13139 - Rev 8

page 30/238

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