| 数据搜索系统,热门电子元器件搜索 |
|
STM32H7B3AI 数据表(PDF) 92 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
STM32H7B3AI 数据表(HTML) 92 Page - STMicroelectronics |
|
92 / 238 page ![]() Symbol Parameter Conditions Min Typ Max Unit Vhyst_BOR_PVD Hysteresis voltage of BOR Hysteresis in Run mode - 100 - mV IDD_BOR_PVD(1) BOR and PVD consumption from VDD - - - 0.630 µA IDD_POR_PDR POR and PDR consumption from VDD - 0.8 - 1.2 VAVM_0 Analog voltage detector for VDDA threshold 0 Rising edge 1.66 1.71 1.76 V Falling edge 1.56 1.61 1.66 VAVM_1 Analog voltage detector for VDDA threshold 1 Rising edge 2.06 2.12 2.19 Falling edge 1.96 2.02 2.08 VAVM_2 Analog voltage detector for VDDA threshold 2 Rising edge 2.42 2.50 2.58 Falling edge 2.35 2.42 2.49 VAVM_3 Analog voltage detector for VDDA threshold 3 Rising edge 2.74 2.83 2.91 Falling edge 2.64 2.72 2.80 Vhyst_VDDA Hysteresis of VDDA voltage detector - - 100 - mV IDD_PVM PVM consumption from VDD(1) - - - 0.25 µA IDD_VDDA Voltage detector consumption on VDDA(1) Resistor bridge - - 2.5 µA 1. Guaranteed by design. 6.3.6 Embedded reference voltage The parameters given in Table 30 are derived from tests performed under ambient temperature and VDD supply voltage conditions summarized in Table 22. General operating conditions. Table 30. Embedded reference voltage Symbol Parameter Conditions Min Typ Max Unit VREFINT(1) Internal reference voltages −40 °C < TJ < 130 °C 1.180 1.216 1.255 V tS_vrefint(2)(3) ADC sampling time when reading the internal reference voltage - 4.3 - - µs tS_vbat(3) VBAT sampling time when reading the internal VBAT reference voltage - 9 - - tstart_vrefint(3) Start time of reference voltage buffer when ADC is enable - - - 4.4 µs Irefbuf(3) Reference Buffer consumption for ADC VDD = 3.3 V 9 13.5 23 µA ΔVREFINT(3) Internal reference voltage spread over the temperature range −40 °C < TJ < 130 °C - 5 15 mV Tcoeff Average temperature coefficient Average temperature coefficient - 20 70 ppm/°C VDDcoeff Average Voltage coefficient 3.0 V < VDD < 3.6 V - 10 1370 ppm/V VREFINT_DIV1 1/4 reference voltage - - 25 - % VREFINT VREFINT_DIV2 1/2 reference voltage - - 50 - VREFINT_DIV3 3/4 reference voltage - - 75 - 1. Guaranteed by design and tested in production at 3.3 V 2. The shortest sampling time for the application can be determined by multiple iterations. 3. Guaranteed by design. STM32H7B3xI Operating conditions DS13139 - Rev 8 page 92/238 |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |