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STM32H7B3AI 数据表(PDF) 151 Page - STMicroelectronics |
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STM32H7B3AI 数据表(HTML) 151 Page - STMicroelectronics |
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151 / 238 page  Figure 57. Power supply and reference decoupling (VREF+ not connected to VDDA) 1 µF // 100 nF 1 µF // 100 nF STM32 VREF+(1) VSSA/VREF-(1) VDDA 1. VREF+ input is not available on all package (refer to Table 1. STM32H7B3xI features and peripheral counts) whereas VREF– is available only on UFBGA176+25, TFBGA225 with SMPS and TFBGA216. When VREF- is not available, it is internally connected to VSSA. Figure 58. Power supply and reference decoupling (VREF+ connected to VDDA) 1 µF // 100 nF STM32 VREF+/VDDA(1) VREF-/VSSA(1) 1. VREF+ input is not available on all package (refer to Table 1. STM32H7B3xI features and peripheral counts) whereas VREF– is available only on UFBGA176+25, TFBGA225 with SMPS and TFBGA216. When VREF- is not available, it is internally connected to VSSA. STM32H7B3xI Operating conditions DS13139 - Rev 8 page 151/238 |
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