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M58LR128HT 数据表(PDF) 111 Page - STMicroelectronics

部件名 M58LR128HT
功能描述  128 Mbit (8 Mb ×16, Multiple Bank, Multilevel interface, Burst) 1.8 V supply Flash memories
PDF  112 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

M58LR128HT 数据表(HTML) 111 Page - STMicroelectronics

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M58LR128HT, M58LR128HB
Revision history
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Revision history
Table 46.
Document revision history
Date
Revision
Changes
17-Feb-2006
0.1
Initial release.
30-Jun-2006
0.2
Document status promoted from Target Specification to Preliminary
data. Small text changes.
By default CR10 = 1 and CR8 = 1 (see Table 11: Configuration
Register). Table 12: Burst type definition modified.
Figure 5: X-Latency and data output configuration example modified.
Section 7.1: Asynchronous Read mode and Section 7.3: Single
Synchronous Read mode modified.
In Table 17: Program/Erase times and endurance cycles:
– Main Block Program at VPP = VDD modified
– Buffer, Main Block and Bank Program modified, and Blank Check
timings added at VPP = VPPH
tVDHPH changed in Table 27: Reset and Power-up AC characteristics.
tWHLL and Note 3 modified in Table 25: Write AC characteristics,
Write Enable controlled.
26-Feb-2007
1
Document status promoted from Preliminary data to full Datasheet.
Address lines corrected in Figure 3: Memory map. Set Configuration
Register is not accepted during Program Suspend but it is accepted
during Erase Suspend (see Figure 24: Erase Suspend & Resume
flowchart and pseudocode).
Figure 10: Asynchronous Page Read AC waveforms modified.
Appendix D: Command interface state tables modified.



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