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ST7LITE49M 数据表(PDF) 113 Page - STMicroelectronics |
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ST7LITE49M 数据表(HTML) 113 Page - STMicroelectronics |
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113 / 188 page  ST7LITE49M On-chip peripherals 113/188 When the I2C cell is enabled, the SDA and SCL ports must be configured as floating inputs. In this case, the value of the external pull-up resistor used depends on the application. When the I2C cell is disabled, the SDA and SCL ports revert to being standard I/O port pins. Figure 56. I2C interface block diagram DATA REGISTER (DR) DATA SHIFT REGISTER COMPARATOR OWN ADDRESS REGISTER 1 (OAR1) CLOCK CONTROL REGISTER (CCR) STATUS REGISTER 1 (SR1) CONTROL REGISTER (CR) CONTROL LOGIC STATUS REGISTER 2 (SR2) INTERRUPT CLOCK CONTROL DATA CONTROL SCL or SCLI SDA or SDAI OWN ADDRESS REGISTER 2 (OAR2) |
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