MPC8280 datasheet(28/1386 Pages) FREESCALE

28 / 1386 page

MPC8280 PowerQUICC II Family Reference Manual, Rev. 1

xxviii

Freescale Semiconductor

Contents

Paragraph

Number

Title

Page

Number

24.4.1

Synchronization in NMSI Mode................................................................................ 24-3

24.4.1.1

In-Line Synchronization Pattern............................................................................ 24-3

24.4.1.2

External Synchronization Signals.......................................................................... 24-3

24.4.1.2.1

External Synchronization Example ................................................................... 24-4

24.4.1.3

Transparent Mode without Explicit Synchronization ............................................ 24-5

24.4.2

Synchronization and the TSA .................................................................................... 24-5

24.4.2.1

Inline Synchronization Pattern .............................................................................. 24-5

24.4.2.2

Inherent Synchronization....................................................................................... 24-5

24.4.3

End of Frame Detection ............................................................................................. 24-5

24.5

CRC Calculation in Transparent Mode.......................................................................... 24-6

24.6

SCC Transparent Parameter RAM................................................................................. 24-6

24.7

SCC Transparent Commands......................................................................................... 24-6

24.8

Handling Errors in the Transparent Controller .............................................................. 24-7

24.9

Transparent Mode and the PSMR .................................................................................. 24-8

24.10

SCC Transparent Receive Buffer Descriptor (RxBD) ................................................... 24-8

24.11

SCC Transparent Transmit Buffer Descriptor (TxBD)................................................ 24-10

24.12

SCC Transparent Event Register (SCCE)/Mask Register (SCCM)............................. 24-11

24.13

SCC Status Register in Transparent Mode (SCCS) ..................................................... 24-12

24.14

SCC2 Transparent Programming Example.................................................................. 24-13

Chapter 25

SCC Ethernet Mode

25.1

Ethernet on the MPC8280.............................................................................................. 25-1

25.2

Features .......................................................................................................................... 25-2

25.3

Connecting the MPC8280 to Ethernet ........................................................................... 25-4

25.4

SCC Ethernet Channel Frame Transmission ................................................................. 25-5

25.5

SCC Ethernet Channel Frame Reception....................................................................... 25-6

25.6

The Content-Addressable Memory (CAM) Interface.................................................... 25-6

25.7

SCC Ethernet Parameter RAM ...................................................................................... 25-7

25.8

Programming the Ethernet Controller............................................................................ 25-9

25.9

SCC Ethernet Commands .............................................................................................. 25-9

25.10

SCC Ethernet Address Recognition............................................................................. 25-11

25.11

Hash Table Algorithm.................................................................................................. 25-12

25.12

Interpacket Gap Time................................................................................................... 25-12

25.13

Handling Collisions ..................................................................................................... 25-12

25.14

Internal and External Loopback................................................................................... 25-13

25.15

Full-Duplex Ethernet Support...................................................................................... 25-13

25.16

Handling Errors in the Ethernet Controller.................................................................. 25-13

25.17

Ethernet Mode Register (PSMR) ................................................................................. 25-14

25.18

SCC Ethernet Receive BD ........................................................................................... 25-16

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