MPC8280 datasheet(41/1386 Pages) FREESCALE

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MPC8280 PowerQUICC II Family Reference Manual, Rev. 1

Freescale Semiconductor

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Contents

Paragraph

Number

Title

Page

Number

34.4.2.2

FCC Parameters ................................................................................................... 34-22

34.4.2.2.1

TCELL_TMP_BASE and RCELL_TMP_BASE ........................................... 34-22

34.4.2.2.2

GMODE........................................................................................................... 34-22

34.4.2.3

IMA-Specific FCC Parameters............................................................................ 34-22

34.4.3

IMA Root Table ....................................................................................................... 34-23

34.4.3.1

IMA Control (IMACNTL) .................................................................................. 34-25

34.4.4

IMA Group Tables ................................................................................................... 34-25

34.4.4.1

IMA Group Transmit Table Entry ....................................................................... 34-25

34.4.4.1.1

IMA Group Transmit Control (IGTCNTL) .................................................... 34-27

34.4.4.1.2

IMA Group Transmit State (IGTSTATE) ....................................................... 34-27

34.4.4.1.3

Transmit Group Order Table............................................................................ 34-28

34.4.4.1.4

ICP Cell Templates .......................................................................................... 34-29

34.4.4.2

IMA Group Receive Table Entry......................................................................... 34-31

34.4.4.2.1

IMA Group Receive Control (IGRCNTL) ..................................................... 34-34

34.4.4.2.2

IMA Group Receive State (IGRSTATE) ........................................................ 34-34

34.4.4.2.3

IMA Receive Group Frame Size .................................................................... 34-35

34.4.4.2.4

Receive Group Order Tables ........................................................................... 34-35

34.4.5

IMA Link Tables...................................................................................................... 34-36

34.4.5.1

IMA Link Transmit Table Entry .......................................................................... 34-36

34.4.5.1.1

IMA Link Transmit Control (ILTCNTL) ....................................................... 34-37

34.4.5.1.2

IMA Link Transmit State (ILTSTATE) .......................................................... 34-38

34.4.5.1.3

IMA Transmit Interrupt Status (ITINTSTAT) ................................................ 34-39

34.4.5.2

IMA Link Receive Table Entry ........................................................................... 34-40

34.4.5.2.1

IMA Link Receive Control (ILRCNTL) ........................................................ 34-41

34.4.5.2.2

IMA Link Receive State (ILRSTATE) ........................................................... 34-42

34.4.5.3

IMA Link Receive Statistics Table ...................................................................... 34-43

34.4.6

Structures in External Memory................................................................................ 34-43

34.4.6.1

Transmit Queues .................................................................................................. 34-44

34.4.6.2

Delay Compensation Buffers (DCB)................................................................... 34-44

34.4.7

IMA Exceptions ....................................................................................................... 34-45

34.4.7.1

IMA Interrupt Queue Entry ................................................................................. 34-45

34.4.7.2

ICP Cell Reception Exceptions ........................................................................... 34-46

34.4.8

IDCR Timer Programming ...................................................................................... 34-47

34.4.8.1

IDCR Master Clock ............................................................................................. 34-47

34.4.8.2

IDCR FCC Parameter Shadow ............................................................................ 34-47

34.4.8.2.1

MPC8280 Features Unavailable if IDCR is Used ........................................... 34-47

34.4.8.2.2

Programming the FCC Parameter Shadow...................................................... 34-48

34.4.8.2.3

On-the-Fly Changes of FCC Parameters ......................................................... 34-48

34.4.8.3

IDCR_Init Command........................................................................................... 34-49

34.4.8.4

IDCR Root Parameters ........................................................................................ 34-49

34.4.8.5

IDCR Table Entry ................................................................................................ 34-49

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