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MPC8280 数据表(PDF) 71 Page - Freescale Semiconductor, Inc

部件名 MPC8280
功能描述  PowerQUICC??II Family Reference Manual
PDF  1386 Pages
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制造商  FREESCALE [Freescale Semiconductor, Inc]
网页  http://www.freescale.com
标志 FREESCALE - Freescale Semiconductor, Inc

MPC8280 数据表(HTML) 71 Page - Freescale Semiconductor, Inc

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MPC8280 PowerQUICC II Family Reference Manual, Rev. 1
Freescale Semiconductor
lxxi
Tables
Table
Number
Title
Page
Number
11-27
SDRAM Device Address Port During activate Command ................................................. 11-51
11-28
SDRAM Device Address Port During read/write Command ............................................. 11-51
11-29
Register Settings (Bank-Based Interleaving) ...................................................................... 11-51
11-30
GPCM Interfaces Signals.................................................................................................... 11-52
11-31
GPCM Strobe Signal Behavior ........................................................................................... 11-53
11-32
TRLX and EHTR Combinations......................................................................................... 11-59
11-33
Boot Bank Field Values after Reset .................................................................................... 11-62
11-34
UPM Interfaces Signals ...................................................................................................... 11-63
11-35
UPM Routines Start Addresses ........................................................................................... 11-66
11-36
RAM Word Bit Settings ...................................................................................................... 11-72
11-37
MxMR Loop Field Usage ................................................................................................... 11-77
11-38
UPM Address Multiplexing ................................................................................................ 11-78
11-39
60x Address Bus Partition................................................................................................... 11-81
11-40
DRAM Device Address Port during an activate command ................................................ 11-81
11-41
Register Settings ................................................................................................................. 11-81
11-42
UPMs Attributes Example .................................................................................................. 11-83
11-43
UPMs Attributes Example .................................................................................................. 11-91
11-44
EDO Connection Field Value Example .............................................................................. 11-93
13-1
TAP Signals........................................................................................................................... 13-2
13-2
Instruction Decoding............................................................................................................. 13-6
14-1
Possible MPC8280 Applications .......................................................................................... 14-3
14-2
Peripheral Prioritization ........................................................................................................ 14-7
14-3
RISC Controller Configuration Register Field Descriptions ................................................ 14-9
14-4
RTSCR Field Descriptions.................................................................................................. 14-11
14-5
RISC Microcode Revision Number .................................................................................... 14-12
14-6
CP Command Register Field Descriptions ......................................................................... 14-13
14-7
CP Command Opcodes ....................................................................................................... 14-14
14-8
Command Descriptions....................................................................................................... 14-15
14-9
Buffer Descriptor Format.................................................................................................... 14-21
14-10
Parameter RAM .................................................................................................................. 14-22
14-11
RISC Timer Table Parameter RAM .................................................................................... 14-24
14-12
TM_CMD Field Descriptions ............................................................................................. 14-25
15-1
SIx RAM Entry (MCC = 0) ................................................................................................ 15-11
15-2
SIx RAM Entry (MCC = 1) ................................................................................................ 15-13
15-3
SIx RAM Entry Descriptions .............................................................................................. 15-14
15-4
SIxGMR Field Descriptions................................................................................................ 15-17
15-5
SIxMR Field Descriptions .................................................................................................. 15-18
15-6
SIxRSR Field Descriptions ................................................................................................. 15-24
15-7
SIxCMDR Field Description .............................................................................................. 15-25
15-8
SIxSTR Field Descriptions ................................................................................................. 15-25
15-9
IDL Signal Descriptions...................................................................................................... 15-27



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