MPC8280 datasheet(32/1386 Pages) FREESCALE

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MPC8280 PowerQUICC II Family Reference Manual, Rev. 1

xxxii

Freescale Semiconductor

Contents

Paragraph

Number

Title

Page

Number

29.3.1

Channel-Specific HDLC Parameters ......................................................................... 29-5

29.3.1.1

Internal Transmitter State (TSTATE)—HDLC Mode ........................................... 29-7

29.3.1.2

Interrupt Mask (INTMSK)—HDLC Mode ........................................................... 29-8

29.3.1.3

Channel Mode Register (CHAMR)—HDLC Mode.............................................. 29-8

29.3.1.4

Internal Receiver State (RSTATE)—HDLC Mode ............................................. 29-10

29.3.2

Channel-Specific Transparent Parameters ............................................................... 29-11

29.3.2.1

Internal Transmitter State (TSTATE)—Transparent Mode ................................. 29-12

29.3.2.2

Interrupt Mask (INTMSK)—Transparent Mode ................................................. 29-12

29.3.2.3

Channel Mode Register (CHAMR)—Transparent Mode.................................... 29-12

29.3.2.4

Internal Receiver State (RSTATE)—Transparent Mode ..................................... 29-14

29.3.3

MCC Parameters for AAL1 CES Usage.................................................................. 29-14

29.3.3.1

Channel-Specific Parameters—AAL1 CES ........................................................ 29-14

29.3.3.1.1

Interrupt Circular Table Entry and Interrupt Mask

(INTMSK) —AAL1 CES............................................................................ 29-15

29.3.3.2

Channel Mode Register (CHAMR)—AAL1 CES .............................................. 29-15

29.3.4

Channel-Specific SS7 Parameters ........................................................................... 29-17

29.3.4.1

Extended Channel Mode Register (ECHAMR)—SS7 Mode.............................. 29-20

29.3.4.2

Signal Unit Error Monitor (SUERM)—SS7 Mode ............................................. 29-22

29.3.4.2.1

SUERM in Japanese SS7................................................................................. 29-23

29.3.4.3

SS7 Configuration Register—SS7 Mode ............................................................ 29-23

29.3.4.3.1

AERM Implementation ................................................................................... 29-24

29.3.4.3.2

AERM in Japanese SS7 ................................................................................... 29-24

29.3.4.3.3

Disabling SUERM ........................................................................................... 29-25

29.3.4.4

SU Filtering—SS7 Mode..................................................................................... 29-25

29.3.4.4.1

Comparison Mask............................................................................................ 29-25

29.3.4.4.2

Comparison State Machine.............................................................................. 29-25

29.3.4.4.3

Filtering Limitations ........................................................................................ 29-26

29.3.4.4.4

Resetting the SU Filtering Mechanism............................................................ 29-26

29.3.4.5

Octet Counting Mode—SS7 Mode...................................................................... 29-27

29.4

Channel Extra Parameters............................................................................................ 29-27

29.5

Superchannels .............................................................................................................. 29-28

29.5.1

Superchannel Table.................................................................................................. 29-28

29.5.2

Superchannels and Receiving .................................................................................. 29-29

29.5.3

Transparent Slot Synchronization............................................................................ 29-29

29.5.4

Superchannelling Programming Examples.............................................................. 29-29

29.6

MCC Configuration Registers (MCCFx) .................................................................... 29-32

29.7

MCC Commands ......................................................................................................... 29-33

29.8

MCC Exceptions .......................................................................................................... 29-34

29.8.1

MCC Event Register (MCCE)/Mask Register (MCCM) ........................................ 29-36

29.8.1.1

Interrupt Circular Table Entry ............................................................................. 29-37

29.8.1.2

Global Transmitter Underrun (GUN) .................................................................. 29-38

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