| 数据搜索系统,热门电子元器件搜索 |
|
ADE75 数据表(PDF) 63 Page - Analog Devices |
|
|
|||||||||||||||||||||||||||||
ADE75 数据表(HTML) 63 Page - Analog Devices |
|
63 / 148 page ![]() Preliminary Technical Data ADE75xx/ADE71xx Rev. PrE | Page 63 of 148 VARDIV[7:0] VAROS[15:0] VARGAIN[11:0] LPF1 + + LVARHR [23:0] ACCUMULATE REACTIVE ENERGY IN INTERNAL REGISTER AND UPDATE THE LVARHR REGISTER AT THE END OF LINCYC HALF LINE CYCLES OUTPUT FROM LPF2 FROM VOLTAGE CHANNEL ADC 23 0 LINCYC [15:0] 48 0 % ZERO CROSS DETECTION CALIBRATION CONTROL TO DIGITAL TO FREQUENCY CONVERTER Figure 48 Line Cycle . Reactive Energy Accumulation Mode APPARENT POWER CALCULATION The apparent power is defined as the maximum power that can be delivered to a load. Vrms and Irms are the effective voltage and current delivered to the load; the apparent power (AP) is defined as Vrms × Irms. Equation 28 gives an expression of the instantaneous power signal in an ac system with a phase shift. () 2 sin( ) rms vt V t ω = i(t) = ) sin( 2 θ + ωt I rms (27) ) ( ) ( ) ( t i t v t p × = p(t) = ) 2 cos( ) cos( θ + ω − θ t I V I V rms rms rms rms (28) The apparent power is defined as Vrms × Irms. This expression is independent from the phase angle between the current and the voltage. Figure 49 illustrates the signal processing in each phase for the calculation of the apparent power in the ADE75XX/ADE71XX. Vrms Irms 0x1A36E2 APPARENT POWER SIGNAL (P) CURRENT RMS SIGNAL – i(t) VOLTAGE RMS SIGNAL – v(t) MULTIPLIER 0x00 0x1CF68C 0x00 0x1CF68C VAGAIN TO DIGITAL TO FREQUENCY CONVERTER Figure 49. Apparent Power Signal Processing The apparent power signal can be read from the waveform register by setting the WAVMODE register (0x0D) and setting the WFSM bit in the Interrupt Enable Register 3 SFR (MIRQENH, 0xDB). Like the current and voltage channels waveform sampling modes, the waveform date is available at sample rates of 27.9 kSPS, 14 kSPS, 7 kSPS, or 3.5 kSPS. The gain of the apparent energy can be adjusted by using the multiplier and VAGAIN register (VAGAIN[11:0]). The gain is adjusted by writing a twos complement, 12-bit word to the VAGAIN register. Equation 29 shows how the gain adjustment is related to the contents of the VAGAIN register. ⎟⎟ ⎠ ⎞ ⎜⎜ ⎝ ⎛ ⎭ ⎬ ⎫ ⎩ ⎨ ⎧ + × = 12 2 1 VAGAIN Power Apparent IN OutputVAGA (29) For example, when 0x7FF is written to the VAGAIN register, the power output is scaled up by 50%. 0x7FF = 2047d, 2047/212 = 0.5. Similarly, 0x800 = –2047d (signed twos complement) and power output is scaled by –50%. Each LSB represents 0.0244% of the power output. The apparent power is calculated with the current and voltage rms values obtained in the rms blocks of the ADE75XX/ADE71XX. Apparent Power Offset Calibration Each rms measurement includes an offset compensation register to calibrate and eliminate the dc component in the rms value—see Current Channel RMS Calculation and Voltage channel RMS Calculation sections. The voltage and current channels rms values are then multiplied together in the apparent power signal processing. Since no additional offsets are created in the multiplication of the rms values, there is no specific offset compensation in the apparent power signal processing. The offset compensation of the apparent power measurement is done by calibrating each individual rms measurement. Apparent Energy Calculation The apparent energy is given as the integral of the apparent power. |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |