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ADE75 数据表(PDF) 100 Page - Analog Devices

部件名 ADE75
功能描述  Single-Phase Energy Measurement IC with 8052 MCU, RTC and LCD driver
PDF  148 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADE75 数据表(HTML) 100 Page - Analog Devices

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ADE75xx/ADE71xx
Preliminary Technical Data
Rev. PrE | Page 100 of 148
switch faster than those generated by the external resistor
ladder, reducing the likelihood of a DC voltage being applied to
a segment and increasing the lifetime of the LCD.
LCD EXTERNAL CIRCUITRY
The voltage generation selection is made by bit EXTRES in the
LCD Configuration X SFR (LCDCONX, 0x9C). This bit is clear
by default for charge pump voltage generation but can be set to
enable an external resistor ladder.
Charge Pump:
Voltage generation through the charge pump requires external
capacitors to store charge. The external connections to VA, VB,
and VC as well as VP1 and VP2 are shown in LCD
Configuration X SFR (LCDCONX, 0x9C).
LCDVA
LCDVB
LCDVC
LCDVP1
LCDVP2
Charge Pump
and
LCD Waveform
Circuitry
470nF
470nF
470nF
100nF
Figure 63: External circuitry for Charge Pump option
External Resistor Ladder:
To enable the external resistor ladder option, set the EXTRES
bit in the LCD Configuration X SFR (LCDCONX, 0x9C). When
EXTRES=1, the LCD waveform voltages are supplied by the
external resistor ladder. Since the LCD voltages are not being
generated on-chip, the LCD bias compensation implemented to
maintain contrast over temperature and supply is not possible.
The external circuitry needed for the resistor ladder option is
shown in Figure 64. The resistors required should be in the
range of 10k to 100k and based on the current required by the
LCD being used.
LCDVA
LCDVB
LCDVC
LCDVP1
LCDVP2
LCD Waveform
Circuitry
Figure 64: External circuitry for External Resistor Ladder option
LCD FUNCTION IN PSM2
The LCDPSM2 bit in the LCD Configuration SFR (LCDCON,
0x95) and the LCDEN bit in the LCD Configuration SFR
(LCDCON, 0x95) control LCD functionality in the PSM2
operating mode. The voltage reference must be enabled during
battery mode for the charge pump voltage generation to work.
Ensure this by setting REF_BAT_EN in the Peripheral
Configuration SFR (PERIPH, 0xF4).
LCDPSM2
LCDEN
Comments
0
0
The display is OFF in PSM2.
0
1
The display is ON in PSM2.
1
X
The display is OFF in PSM2.
Note that the LCD configuration and data memory is retained
when the display is turned off.
EXAMPLE LCD SETUP
An example to set up the LCD peripheral for a specific LCD is
described below.
Type of LCD: 5V, 4x multiplexed with 1/3 bias, 96 segments
Voltage Generation: Internal Charge Pump
Refresh Rate: 64Hz
A 96 segment LCD with 4x multiplexing requires 96/4=24
segment lines. There are 16 pins that automatically dedicated
for use as LCD segments, FP0 to FP15. Eight more pins must be
chosen for the LCD function. Since the LCD has 4x
multiplexing, all four common lines are used so COM2/FP28
and COM3/FP27 cannot be utilized as segment lines. Based on
the alternate functions of the pins used for FP16 through FP25,
FP16-23 are chosen for the seven remaining segment lines.
These pins will be enabled for LCD functionality in the LCD
Segment Enable SFR (LCDSEGE, 0x97) and LCD Segment
Enable 2 SFR (LCDSEGE2, 0xED).
To determine contrast setting for this 5V LCD, look in Table 76
to find the BIASLVL[5:0] setting that corresponds to a VC of 5V
in 1/3 Bias Mode. The nominal bias level setting for this LCD is
BIASLVL[5:0]=[111111].
The LCD is setup with the following 8052 code:
; setup LCD pins to have LCD functionality
MOV
LCDSEGE, # 00111100b
MOV
LCDSEGE2, #00001111b
; setup LCDCON for fLCDCLK=2048Hz, 1/3 bias and 4x multiplexing
MOV
LCDCON, #00000111b
; setup LCDCONX for charge pump and BIASLVL[110111]
MOV
LCDCONX, #00110111b
; set up refresh rate for 64Hz with fLCDCLK=2048Hz, from
Table 79
MOV
LCDCLK, #00000011b
; set up LCD data registers with data to be displayed using
; LCDPTR and LCDDATA registers



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