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ADE75 数据表(PDF) 12 Page - Analog Devices |
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ADE75 数据表(HTML) 12 Page - Analog Devices |
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12 / 148 page  ADE75xx/ADE71xx Preliminary Technical Data Rev. PrE | Page 12 of 148 Table 3. I2C COMPATIBLE INTERFACE TIMING Parameter Parameter Min Max Unit tL SCLOCK Low Pulse Width 1.95 μs tH SCLOCK High Pulse Width 1.95 μs tSHD Start Condition Hold Time TBD μs tDSU Data Setup Time TBD μs tDHD Data Hold Time TBD μs tRSU Setup Time for Repeated Start TBD μs tPSU Stop Condition Setup Time TBD μs tBUF Bus Free Time between a Stop Condition and a Start Condition TBD μs tR Rise Time of Both SCLOCK and SDATA 300 ns tF Fall Time of Both SCLOCK and SDATA 300 ns tSUP1 Pulse Width of Spike Suppressed 50 ns ____________________________________________ 1 Input filtering on both the SCLOCK and SDATA inputs suppresses noise spikes less than 50 ns. MSB tBUF SDATA (I/O) SCLK (I) STOP CONDITION START CONDITION REPEATED START LSB ACK MSB 1 2-7 8 9 1 S(R) PS tPSU tDSU tSHD tDHD tSUP tDSU tDHD tH tSUP tL tRSU tR tR tF tF Figure 3. I2C Compatible Interface Timing |
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