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ADE75 数据表(PDF) 28 Page - Analog Devices |
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ADE75 数据表(HTML) 28 Page - Analog Devices |
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28 / 148 page ![]() Preliminary Technical Data ADE75xx/ADE71xx Rev. PrE | Page 28 of 148 Battery Switchover and Power Supply Restored PSM Interrupt The ADE75XX/ADE71XX can be configured to generate a PSM interrupt when the source of VSW changes from VDD to VBAT, indicating battery switchover. Setting the EBSO bit in the Power Management Interrupt Enable SFR (IPSME, 0xEC) enables this event to generate a PSM interrupt. The ADE75XX/ADE71XX can also be configured to generate an interrupt when the source of VSW changes from VBAT to VDD, indicating that the VDD power supply has been restored. This event is enabled to generate a PSM interrupt by setting the EPSR bit in the Power Management Interrupt Enable SFR (IPSME, 0xEC). The flags in the Power Management Interrupt Flag SFR (IPSMF, 0xF8) for these interrupts, BSOF and PSRF are set regardless of whether the respective enable bits have been set. The battery switchover and power supply restore event flags, BSOF and PSRF, are latched. These events must be cleared by writing a zero to these bits. Bit 6 in the Peripheral Configuration SFR (PERIPH, 0xF4), VSWSOURCE, tracks the source of VSW. The bit is set when VSW is connected to VDD and cleared when VSW is connected to VBAT. VDCIN ADC PSM Interrupt The ADE75XX/ADE71XX can be configured to generate a PSM interrupt when VDCIN changes magnitude by more than a configurable threshold. This threshold is set in the Temperature and Voltage ADC Delta SFR (DIFFPROG, 0xF3) –see External Voltage Measurement section. Setting the EVADC bit in the Power Management Interrupt Enable SFR (IPSME, 0xEC) enables this event to generate a PSM interrupt. The VDCIN voltage is measured using a dedicated ADC. These measurements take place in the background at intervals to check the change in VDCIN. Conversions can also be initiated by writing to the Start ADC Measurement SFR (ADCGO, 0xD8). The FVADC flag will indicate that a VDCIN measurement is ready. See the External Voltage Measurement section for details on how VDCIN is measured. VBAT Monitor PSM Interrupt The VBAT voltage is measured using a dedicated ADC. These measurements take place in the background at intervals to check the change in VBAT. The BATTF bit is set when the battery level is lower than the threshold set in the Battery detection threshold SFR (BATVTH, 0xFA) or when a new measurement is ready in the Battery ADC value SFR (BATADC, 0xDF) - see Battery measurement section. Setting the EBATT bit in the Power Management Interrupt Enable SFR (IPSME, 0xEC) enables this event to generate a PSM interrupt. VDCIN Monitor PSM Interrupt The VDCIN voltage is monitored by a comparator. The FVDC bit in the Power Management Interrupt Flag SFR (IPSMF, 0xF8) is set when the VDCIN input level is lower than 1.2 V. Setting the EVDCIN bit in the Power Management Interrupt Enable SFR (IPSME, 0xEC) enables this event to generate a PSM interrupt. This event associated with the SAG monitoring can be used to detect a power supply - VDD - being compromised and trigger further actions prior to decide a switch of VDD to VBAT . SAG Monitor PSM Interrupt The ADE75XX/ADE71XX energy measurement DSP monitors the ac voltage input at the VP and VN input pins. The SAGLVL register is used to set the threshold for a line voltage sag event. The SAGF bit in the Power Management Interrupt Flag SFR (IPSMF, 0xF8) is set if the line voltage stays below the level set in the SAGLVL register for the number of line cycles set in the SAGCYC register, - see Line Voltage Sag Detection section. Setting the ESAG bit in the Power Management Interrupt Enable SFR (IPSME, 0xEC) enables this event to generate a PSM interrupt. USING THE POWER SUPPLY FEATURES In an energy meter application, VDD, the 3.3V power supply, is typically generated from the ac line voltage and regulated to 3.3V by a voltage regulator IC. The pre-regulated DC voltage, typically 5V to 12V, can be connected to VDCIN through a resistor divider. A 3.6V battery can be connected to VBAT. Figure 11 shows how the ADE75XX/ADE71XX power supply inputs would be set up in this application. |
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