ADE75 datasheet(90/148 Pages) AD

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ADE75xx/ADE71xx

Preliminary Technical Data

Rev. PrE | Page 90 of 148

Figure 62: Interrupt System Functional Block Diagram

INTERRUPT VECTORS

When an interrupt occurs, the program counter is pushed onto

the stack, and the corresponding interrupt vector address is

loaded into the program counter. When the interrupt service

routine has been completed, the program counter is popped off

the stack by a RETI instruction. This allows program execution

to resume from where it was interrupted. The interrupt vector

addresses are shown in Table 70.

Table 70. Interrupt Vector Addresses

Source

Vector Address

IE0

0x0003

TF0

0x000B

IE1

0x0013

TF1

0x001B

RI + TI

0x0023

TF2 + EXF2

0x002B

ITEMP (Temperature ADC)

0x0033

ISPI/I2CI

0x003B

IPSM (Power Supply)

0x0043

IADE (Energy Measurement DSP)

0x004B

IRTC

0x0053

WDT (Watchdog Timer)

0x005B

INTERRUPT LATENCY

The 8051 architecture requires that at least one instruction

executes between interrupts. To ensure this, the 8051 MCU core

hardware prevents the program counter from jumping to an ISR

immediately after completing a RETI instruction or an access of

the IP and IE registers.

The shortest interrupt latency is 3.25 instruction cycles, 800ns

with a clock of 4.096MHz. The longest interrupt latency for a

high priority interrupt results when a pending interrupt is

generated during a low priority interrupt RETI, followed by a

multiply instruction. This results in a maximum interrupt

latency of 16.25 instruction cycles, 4us with a clock of

4.096MHz.

CONTEXT SAVING

When the 8052 vectors to an interrupt, only the program

counter is saved on the stack. Therefore the interrupt service

routine must be written to ensure that registers that are used in

the main program are restored to their pre-interrupt state.

Common registers that may be modified in the ISR are the

accumulator, and the PSW register. Any general purpose

registers that are used as scratchpads in the ISR should also be

restored before exiting the interrupt. The example 8051 code

shown below shows how to restore some commonly used

registers:

GeneralISR:

; save the current Accumulator value

PUSH

ACC

; save the current status and register bank selection

PUSH

PSW

; service interrupt

…

; restore the status and register bank selection

POP

PSW

; restore the accumulator

POP

ACC

RETI

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