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ADE75 数据表(PDF) 104 Page - Analog Devices |
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ADE75 数据表(HTML) 104 Page - Analog Devices |
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104 / 148 page  ADE75xx/ADE71xx Preliminary Technical Data Rev. PrE | Page 104 of 148 flash memory. Upon completion of the flash memory operation, the FLSHKY register is reset such that it must be written prior to another flash memory operation. Requiring the key to be set before an access to the flash memory decreases the likelihood of user code or data being overwritten by a program that has run amuck. The program counter, PC, is held on the instruction where the ECON register is written to until the flash memory controller is done performing the requested operation. Then the PC increments to continue with the next instruction. Any interrupts requests that occur while the flash controller is performing an operation are not handled until the flash operation is complete. All peripherals, such as timers and counters, will continue to operate as configured throughout the flash memory access. Table 87. Flash Control SFR (ECON, 0xB9) Bit Location Bit Mnemonic Default Value Description 7-0 ECON 0 1 Write byte: The value in EDATA is written to the Flash memory, at the page address given by EADRH and EARDL. Note that the byte being addressed must be pre-erased 2 Erase page: A 512-byte page of Flash memory address is erased. The page is selected by the address in EADRH/L. Any address in the page can be written to EADRH/L to select it for erasure. 3 Erase all: All 16 or 32kbytes of the Flash memory are erased. Note: This command is used during serial and parallel download modes but should not be executed by user code. 4 Read byte: The byte in the Flash memory, addressed by EADRH/L, is read into EDATA. 5 Erase page and write byte: The page that holds the byte addressed by EADRH/L is erased. Then, data in EDATA is written to the byte of flash memory addressed by EADRH/L. 8 Protect code: See Protecting the Flash. Table 88. Flash Key SFR (FLSHKY, 0xBA) Bit Location Bit Mnemonic Default Value Description 7-0 FLSHKY 0xFF The content of this SFR is compared to the Flash key – 0x3B. If the two values match the next ECON operation is allowed - see Protecting the Flash. Table 89. Flash Protection Key SFR (PROTKY, 0xBB) Bit Location Bit Mnemonic Default Value Description 7-0 PROTKY 0xFF The content of this SFR is compared to the Flash memory location at address 0x3FFA. If the two values match, the update of the Write/Erase and Read protection set up is allowed - see Protecting the Flash. If the protection Key in the flash is 0xFF, PROTKY SFR value is not used for comparison. The PROTKY SFR is also used to write the protection key in the flash. This is done by writing the desired value in PROTKY and write 0x08 in the ECON SFR. This operation can only be done once. Table 90. Flash Data SFR (EDATA, 0xBC) Bit Location Bit Mnemonic Default Value Description 7-0 EDATA 0 Flash pointer data Table 91. Flash Write/Erase Protection 0 SFR (PROTB0, 0xBD) Bit Bit Default Description |
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