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H8S/2218 数据表(PDF) 375 Page - Renesas Technology Corp

部件名 H8S/2218
功能描述  16-Bit Single-Chip Microcomputer H8S Family/H8S/2200 Series
PDF  750 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

H8S/2218 数据表(HTML) 375 Page - Renesas Technology Corp

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Section 9 16-Bit Timer Pulse Unit (TPU)
Rev.6.00 Jun. 03, 2008 Page 327 of 698
REJ09B0074-0600
Buffer Operation Timing: Figures 9.36 and 9.37 show the timing in buffer operation.
TGRA,
TGRB
Compare
match signal
TCNT
TGRC,
TGRD
nN
N
n
n + 1
φ
Figure 9.36 Buffer Operation Timing (Compare Match)
TGRA,
TGRB
TCNT
Input capture
signal
TGRC,
TGRD
N
n
n
N + 1
N
N
N + 1
φ
Figure 9.37 Buffer Operation Timing (Input Capture)
9.7.2
Interrupt Signal Timing
TGF Flag Setting Timing in Case of Compare Match: Figure 9.38 shows the timing for setting
of the TGF flag in TSR by compare match occurrence, and TGI interrupt request signal timing.



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