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H8S/2218 数据表(PDF) 513 Page - Renesas Technology Corp |
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H8S/2218 数据表(HTML) 513 Page - Renesas Technology Corp |
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513 / 750 page ![]() Section 14 Universal Serial Bus (USB) Rev.6.00 Jun. 03, 2008 Page 465 of 698 REJ09B0074-0600 Section 14 Universal Serial Bus (USB) This LSI incorporates a USB function module complying with USB standard version 1.1. Figure 14.1 shows the block diagram of the USB. 14.1 Features • USB standard version 2.0 full speed mode (12 Mbps) support • Bus-powered mode or self-powered mode is selectable via the USB specific pin (UBPM) • On-chip PLL circuit to generate the USB operation clock (24 MHz × 2 = 48 MHz, 16 MHz × 3 = 48 MHz) • On-chip bus transceiver • Standard commands are processed automatically by hardware ⎯ Only Set_Descriptor, Get_Descriptor, Class/VendorCommand, and SynchFrame commands should be processed by software • Current Configuration value can be checked by Set_Configuration interrupt • Three transfer modes supported (Control, Bulk, Interrupt) • Configuration of four endpoints; EP0, EP1, EP2, and EP3 Configuration 1 Interface0 Alternate 0 Total 456-byte FIFO incorporated EP0s (Control_setup transfer, FIFO 8 bytes) EP0i (Control_in transfer, FIFO 64 bytes) EP0o (Control_out tranfer, FIFO 64 bytes) EP1 (Bulk_in transfer, FIFO 64 bytes × 2 [dual-buffer confifugraion]) EP2 (Bulk_out transfer, FIFO 64 bytes × 2 [dual-buffer confifugraion]) EP3 (Interrup_in transfer, FIFO 64 bytes) • 16 kinds of interrupts ⎯ Suspend/resume interrupt source can be assigned for IRQ6 ⎯ Each interrupt source except the suspend/resume interrupt source can be assigned for EXIRQ0 or EXIRQ1 via registers • DMA transfer interface ⎯ DMA transfer is enabled for the Bulk transfer data of EP1 and EP2 • 8-bit bus (3 cycle access timing) connected to the external bus interface ⎯ Internal registers are addressed to a part of area 6 of external address (H'C00000 to H'DFFFFF) ⎯ Address H'C00100 to H'DFFFFF is for USB reserved area and thus access prohibited. |
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