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H8S/2218 数据表(PDF) 514 Page - Renesas Technology Corp |
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H8S/2218 数据表(HTML) 514 Page - Renesas Technology Corp |
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514 / 750 page ![]() Section 14 Universal Serial Bus (USB) Rev.6.00 Jun. 03, 2008 Page 466 of 698 REJ09B0074-0600 Note: In this section, power-down mode represents watch, subactive, subsleep, and software standby modes. Registers 456-byte FIFO EP3 UDC synchronization circuit Interface [Connection/disconnection] [Internal bus] [Main clock] [Interrupt request signal] [DMA transfer request signal] [Power mode selection] Peripheral data bus Peripheral address bus Peripheral bus control signal EXIRQ0, EXIRQ1 DREQ0, DREQ1 IRQ6 (12MHz) (48MHz) φ VBUS UBPM UDC core PLL curcuit UDC: EP0s: EP0i: EP0o: USB Device Controller Endpoint 0 setup FIFO Endpoint 0 In FIFO Endpoint 0 Out FIFO EP1: EP2: EP3: End Point 1 FIFO End Point 2 FIFO End Point 3 FIFO Legend: EP0o EP1 EP0s EP2 EP0i USB On-chip transceiver [Data] [Power supply] DrVSS Rs Rs DrVCC USPND USD+ USD- D+ D- Figure 14.1 Block Diagram of USB |
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