H8SSLASH2218 datasheet(583/750 Pages) RENESAS

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Section 15 A/D Converter

Rev.6.00 Jun. 03, 2008 Page 535 of 698

REJ09B0074-0600

Section 15 A/D Converter

This LSI includes a successive approximation type 10-bit A/D converter that allows up to six

analog input channels to be selected. The block diagram of the A/D converter is shown in figure

15.1.

15.1

Features

• 10-bit resolution

• Six input channels

• Conversion time: 8.1 µs per channel (at 16-MHz operation), 10.7 µs per channel (at 24-MHz

operation), 21.8 µs per channel (at 6-MHz operation)

• Two operating modes

⎯ Single mode: Single-channel A/D conversion

⎯ Scan mode: Continuous A/D conversion on 1 to 4 channels

• Four data registers

⎯ Conversion results are held in a 16-bit data register for each channel

• Sample and hold function

• Three methods conversion start

⎯ Software

⎯ Timer (TPU) conversion start trigger

⎯ External trigger signal (ADTRG)

• Interrupt request

⎯ An A/D conversion end interrupt request (ADI) can be generated

• Module stop mode can be set

• Settable analog conversion voltage range

Analog conversion voltage range settable using the reference voltage pin (Vref) as the

reference voltage

ADCMS34A_000120011200

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