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H8S/2218 数据表(PDF) 587 Page - Renesas Technology Corp |
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H8S/2218 数据表(HTML) 587 Page - Renesas Technology Corp |
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587 / 750 page ![]() Section 15 A/D Converter Rev.6.00 Jun. 03, 2008 Page 539 of 698 REJ09B0074-0600 Bit Bit Name Initial Value R/W Description 6 ADIE 0 R/W A/D Interrupt Enable A/D conversion end interrupt (ADI) request enabled when 1 is set. 5 ADST 0 R/W A/D Start Clearing this bit to 0 stops A/D conversion, and the A/D converter enters the wait state. Setting this bit to 1 starts A/D conversion. It can be set to 1 by software, the timer conversion start trigger, and the A/D external trigger ( ADTRG). In single mode, this bit is cleared to 0 automatically when conversion on the specified channel is complete. In scan mode, conversion continues sequentially on the specified channels until this bit is cleared to 0 by software, a reset, a transition to standby mode, or module stop mode. 4 SCAN 0 R/W Scan Mode Selects single mode or scan mode as the A/D conversion operating mode. 0: Single mode 1: Scan mode 3 2 1 0 CH3 CH2 CH1 CH0 0 0 0 0 R/W R/W R/W R/W Channel Select 3 to 0 Select analog input channels. When SCAN = 0 When SCAN = 1 0000: AN0 0000: AN0 0001: AN1 0001: AN0 to AN1 0010: AN2 0010: AN0 to AN2 0011: AN3 0011: AN0 to AN3 01 ××: Setting prohibited 01xx: Setting prohibited 10 ××: Setting prohibited 1xxx: Setting prohibited 11 ××: Setting prohibited 1110: AN14 1111: AN15 Legend: ×: Don’t care Note: * The write value should always be 0 to clear this flag. |
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