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H8S/2218 数据表(PDF) 610 Page - Renesas Technology Corp |
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H8S/2218 数据表(HTML) 610 Page - Renesas Technology Corp |
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610 / 750 page ![]() Section 17 Flash Memory (F-ZTAT Version) Rev.6.00 Jun. 03, 2008 Page 562 of 698 REJ09B0074-0600 Bit Bit Name Initial Value R/W Description 2 PV1 0 R/W Program-Verify When this bit is set to 1, the flash memory transits to program-verify mode. When it is cleared to 0, program- verify mode is cancelled. [Setting condition] When FWE = 1 and SWE1 = 1 1 E1 0 R/W Erase When this bit is set to 1 while the SWE1 and ESU1 bits are 1, the flash memory transits to erase mode. When it is cleared to 0, erase mode is cancelled. [Setting condition] When FWE = 1, SWE1 = 1, and ESU1 = 1 0 P1 0 R/W Program When this bit is set to 1 while the SWE1 and PSU1 bits are 1, the flash memory transits to program mode. When it is cleared to 0, program mode is cancelled. [Setting condition] When FWE = 1, SWE1 = 1, and PSU1 = 1 Note: * Set according to the FWE pin state. 17.5.2 Flash Memory Control Register 2 (FLMCR2) FLMCR2 is a register that displays the state of flash memory programming/erasing. FLMCR2 is a read-only register, and should not be written to. Bit Bit Name Initial Value R/W Description 7 FLER 0 R Indicates that an error has occurred during an operation on flash memory (programming or erasing). When FLER is set to 1, flash memory goes to the error- protection state. See section 17.9.3, Error Protection, for details. 6 to 0 — All 0 — Reserved These bits are always read as 0. |
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