H8SSLASH2218 datasheet(613/750 Pages) RENESAS

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Section 17 Flash Memory (F-ZTAT Version)

Rev.6.00 Jun. 03, 2008 Page 565 of 698

REJ09B0074-0600

17.5.5

RAM Emulation Register (RAMER)

RAMER specifies the area of flash memory to be overlapped with part of RAM when emulating

real-time flash memory programming. RAMER settings should be made in user mode or user

program mode. To ensure correct operation of the emulation function, the ROM for which RAM

emulation is performed should not be accessed immediately after this register has been modified.

Normal execution of an access immediately after register modification is not guaranteed. For

details, refer to section 17.7, Flash Memory Emulation in RAM.

Bit

Bit Name Initial Value

R/W

Description

7 to 4 —

All 0

R/W

Reserved

These bits always read as 0. The write value should

always be 0.

RAMS

R/W

RAM Select

Specifies selection or non-selection of flash memory

emulation in RAM. When RAMS = 1, the flash memory

is overlapped with part of RAM, and all flash memory

block are program/erase-protected.

RAM2

RAM1

RAM0

R/W

Flash Memory Area Selection

When the RAMS bit is set to 1, selects one of the

following flash memory areas to overlap the RAM area.

The areas correspond with 1-kbyte erase blocks.

000: H'000000 to H'0003FF (EB0)

001: H'000400 to H'0007FF (EB1)

010: H'000800 to H'000BFF (EB2)

011: H'000C00 to H'000FFF (EB3)

100: Setting prohibited

101: Setting prohibited

110: Setting prohibited

111: Setting prohibited

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