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H8S/2218 数据表(PDF) 615 Page - Renesas Technology Corp

部件名 H8S/2218
功能描述  16-Bit Single-Chip Microcomputer H8S Family/H8S/2200 Series
PDF  750 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

H8S/2218 数据表(HTML) 615 Page - Renesas Technology Corp

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Section 17 Flash Memory (F-ZTAT Version)
Rev.6.00 Jun. 03, 2008 Page 567 of 698
REJ09B0074-0600
17.6
On-Board Programming Modes
When pins are set to on-board programming mode and a reset-start is executed, a transition is
made to the on-board programming state in which program/erase/verify operations can be
performed on the on-chip flash memory. There are two on-board programming modes: boot mode
and user program mode. The pin settings for transition to each of these modes are shown in table
17.3. For a diagram of the transitions to the various flash memory modes, see figure 17.2.
Table 17.3
Setting On-Board Programming Modes
Mode
EMLE
FWE
MD2
MD1
MD0
SCI boot mode
(HD64F2218,
HD64F2212,
HD64F2211)
Advanced: single-chip mode
0
1
0
1
×
Advanced: single-chip mode
24 MHz system clock
0
1
0
1
0
USB boot mode
(HD64F2218U,
HD64F2212U,
HD64F2211U)
Advanced: single-chip mode
16 MHz system clock
0
1
0
1
1
User program mode
Advanced: on-chip ROM
extended mode
(MCU operating mode 6)
0
1
1
1
0
Advanced: Single-chip mode
(MCU operating mode 7)
0
1
1
1
1
17.6.1
SCI Boot Mode (HD64F2218, HD64F2212, and HD64F2211)
When a reset-start is executed after the LSI's pins have been set to boot mode, the boot program
built into the LSI is started and the programming control program prepared in the host is serially
transmitted to the LSI via the SCI. In the LSI, the programming control program received via the
SCI is written into the programming control program area in on-chip RAM. After the transfer is
completed, control branches to the start address of the programming control program area and the
programming control program execution state is entered (flash memory programming is
performed). The system configuration in boot mode is shown in figure 17.7.



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