H8SSLASH2225 datasheet(401/1071 Pages) RENESAS

401 / 1071 page

Section 10 I/O Ports

Rev. 5.00 Aug 08, 2006 page 315 of 982

REJ09B0054-0500

10.2

Port 3

Port 3 is a general 7-bit I/O port and has the following registers.

The P34, P35, and SCK1 function as NMOS push/pull outputs.*

• Port 3 data direction register (P3DDR)

• Port 3 data register (P3DR)

• Port 3 register (PORT3)

• Port 3 open drain control register (P3ODR)

Note: * Function as CMOS outputs in the H8S/2237 Group and H8S/2227 Group.

10.2.1

Port 3 Data Direction Register (P3DDR)

P3DDR specifies input or output of the port 3 pins using the individual bits.

P3DDR cannot be read; if it is, an undefined value will be read.

This register is a write-only register, and cannot be written by bit manipulation instruction. For

details, see section 2.9.4, Access Methods for Registers with Write-Only Bits.

Bit

Bit Name

Initial Value

R/W

Description

—

Undefined

—

Reserved

These bits are always read as undefined value.

P36DDR

P35DDR

P34DDR

P33DDR

P32DDR

P31DDR

P30DDR

When a pin is specified as a general purpose I/O

port, setting this bit to 1 makes the corresponding

port 3 pin an output port. Clearing this bit to 0

makes the pin an input port.

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