H8SSLASH2225 datasheet(60/1071 Pages) RENESAS

60 / 1071 page

Rev. 5.00 Aug 08, 2006 page lx of lxxxvi

16.4 Operation .......................................................................................................................... 653

16.4.1 I2C Bus Data Format............................................................................................ 653

16.4.2 Initial Setting........................................................................................................ 655

16.4.3 Master Transmit Operation .................................................................................. 655

16.4.4 Master Receive Operation.................................................................................... 659

16.4.5 Slave Receive Operation...................................................................................... 664

16.4.6 Slave Transmit Operation .................................................................................... 669

16.4.7 IRIC Setting Timing and SCL Control ................................................................ 672

16.4.8 Operation Using the DTC .................................................................................... 673

16.4.9 Noise Canceler..................................................................................................... 674

16.4.10 Initialization of Internal State .............................................................................. 674

16.5 Interrupt Source ................................................................................................................ 676

16.6 Usage Notes ...................................................................................................................... 676

16.6.1 Module Stop Mode Setting .................................................................................. 687

Section 17 A/D Converter................................................................................................. 689

17.1 Features............................................................................................................................. 689

17.2 Input/Output Pins .............................................................................................................. 691

17.3 Register Descriptions ........................................................................................................ 692

17.3.1 A/D Data Registers A to D (ADDRA to ADDRD) ............................................. 692

17.3.2 A/D Control/Status Register (ADCSR) ............................................................... 693

17.3.3 A/D Control Register (ADCR) ............................................................................ 695

17.4 Interface to Bus Master ..................................................................................................... 696

17.5 Operation .......................................................................................................................... 697

17.5.1 Single Mode......................................................................................................... 697

17.5.2 Scan Mode ........................................................................................................... 698

17.5.3 Input Sampling and A/D Conversion Time ......................................................... 699

17.5.4 External Trigger Input Timing............................................................................. 701

17.6 Interrupt Source ................................................................................................................ 701

17.7 A/D Conversion Accuracy Definitions ............................................................................. 702

17.8 Usage Notes ...................................................................................................................... 704

17.8.1 Module Stop Mode Setting .................................................................................. 704

17.8.2 Permissible Signal Source Impedance ................................................................. 704

17.8.3 Influences on Absolute Accuracy ........................................................................ 704

17.8.4 Range of Analog Power Supply and Other Pin Settings ...................................... 705

17.8.5 Notes on Board Design ........................................................................................ 705

17.8.6 Notes on Noise Countermeasures ........................................................................ 705

Section 18 D/A Converter................................................................................................. 707

18.1 Features............................................................................................................................. 707

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