H8SSLASH2225 datasheet(70/1071 Pages) RENESAS

70 / 1071 page

Rev. 5.00 Aug 08, 2006 page lxx of lxxxvi

Figure 9.12 DTC Operation Timing (Example of Chain Transfer) ........................................... 300

Section 10 I/O Ports

Figure 10.1 Types of Open Drain Outputs ................................................................................ 318

Section 11 16-Bit Timer Pulse Unit (TPU)

Figure 11.1 Block Diagram of TPU (H8S/2258 Group, H8S/2239 Group, H8S/2238 Group,

and H8S/2237 Group) ............................................................................................ 362

Figure 11.2 Block Diagram of TPU (H8S/2227 Group)............................................................ 363

Figure 11.3 Example of Counter Operation Setting Procedure ................................................. 398

Figure 11.4 Free-Running Counter Operation........................................................................... 399

Figure 11.5 Periodic Counter Operation.................................................................................... 400

Figure 11.6 Example of Setting Procedure for Waveform Output by Compare Match............. 400

Figure 11.7 Example of 0 Output/1 Output Operation .............................................................. 401

Figure 11.8 Example of Toggle Output Operation .................................................................... 401

Figure 11.9 Example of Setting Procedure for Input Capture Operation................................... 402

Figure 11.10 Example of Input Capture Operation ..................................................................... 403

Figure 11.11 Example of Synchronous Operation Setting Procedure ......................................... 404

Figure 11.12 Example of Synchronous Operation....................................................................... 405

Figure 11.13 Compare Match Buffer Operation.......................................................................... 406

Figure 11.14 Input Capture Buffer Operation.............................................................................. 406

Figure 11.15 Example of Buffer Operation Setting Procedure.................................................... 407

Figure 11.16 Example of Buffer Operation (1) ........................................................................... 408

Figure 11.17 Example of Buffer Operation (2) ........................................................................... 409

Figure 11.18 Cascaded Operation Setting Procedure .................................................................. 410

Figure 11.19 Example of Cascaded Operation (1)....................................................................... 410

Figure 11.20 Example of Cascaded Operation (2)....................................................................... 411

Figure 11.21 Example of PWM Mode Setting Procedure ........................................................... 413

Figure 11.22 Example of PWM Mode Operation (1) .................................................................. 414

Figure 11.23 Example of PWM Mode Operation (2) .................................................................. 414

Figure 11.24 Example of PWM Mode Operation (3) .................................................................. 415

Figure 11.25 Example of Phase Counting Mode Setting Procedure............................................ 417

Figure 11.26 Example of Phase Counting Mode 1 Operation ..................................................... 417

Figure 11.27 Example of Phase Counting Mode 2 Operation ..................................................... 419

Figure 11.28 Example of Phase Counting Mode 3 Operation ..................................................... 420

Figure 11.29 Example of Phase Counting Mode 4 Operation ..................................................... 421

Figure 11.30 Phase Counting Mode Application Example.......................................................... 422

Figure 11.31 Count Timing in Internal Clock Operation............................................................. 426

Figure 11.32 Count Timing in External Clock Operation ........................................................... 427

Figure 11.33 Output Compare Output Timing ............................................................................ 427

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