H8SSLASH2225 datasheet(59/1071 Pages) RENESAS

59 / 1071 page

Rev. 5.00 Aug 08, 2006 page lix of lxxxvi

15.6.3 Serial Data Transmission (Clocked Synchronous Mode) .................................... 603

15.6.4 Serial Data Reception (Clocked Synchronous Mode).......................................... 606

15.6.5 Simultaneous Serial Data Transmission and Reception

(Clocked Synchronous Mode) ............................................................................. 608

15.7 Operation in Smart Card Interface .................................................................................... 610

15.7.1 Pin Connection Example...................................................................................... 610

15.7.2 Data Format (Except for Block Transfer Mode) .................................................. 610

15.7.3 Block Transfer Mode ........................................................................................... 612

15.7.4 Receive Data Sampling Timing and Reception Margin....................................... 612

15.7.5 Initialization ......................................................................................................... 613

15.7.6 Serial Data Transmission (Except for Block Transfer Mode).............................. 614

15.7.7 Serial Data Reception (Except for Block Transfer Mode) ................................... 617

15.7.8 Clock Output Control........................................................................................... 618

15.8 SCI Select Function (H8S/2239 Group Only)................................................................... 620

15.9 Interrupt Sources ............................................................................................................... 622

15.9.1 Interrupts in Normal Serial Communication Interface Mode............................... 622

15.9.2 Interrupts in Smart Card Interface Mode ............................................................. 624

15.10 Usage Notes ...................................................................................................................... 625

15.10.1 Module Stop Mode Setting .................................................................................. 625

15.10.2 Break Detection and Processing (Asynchronous Mode Only)............................. 625

15.10.3 Mark State and Break Detection (Asynchronous Mode Only)............................. 625

15.10.4 Receive Error Flags and Transmit Operations

(Clocked Synchronous Mode Only)..................................................................... 625

15.10.5 Restrictions on Use of DMAC or DTC................................................................ 626

15.10.6 Operation in Case of Mode Transition................................................................. 626

15.10.7 Switching from SCK Pin Function to Port Pin Function ..................................... 630

15.10.8 Assignment and Selection of Registers................................................................ 631

Section 16 I2C Bus Interface (IIC) (Option)................................................................ 633

16.1 Features ............................................................................................................................. 633

16.2 Input/Output Pins .............................................................................................................. 636

16.3 Register Descriptions ........................................................................................................ 636

16.3.1 I2C Bus Data Register (ICDR) ............................................................................. 637

16.3.2 Slave Address Register (SAR) ............................................................................. 639

16.3.3 Second Slave Address Register (SARX) ............................................................. 639

16.3.4 I2C Bus Mode Register (ICMR)........................................................................... 640

16.3.5 Serial Control Register X (SCRX)....................................................................... 643

16.3.6 I2C Bus Control Register (ICCR)......................................................................... 644

16.3.7 I2C Bus Status Register (ICSR)............................................................................ 649

16.3.8 DDC Switch Register (DDCSWR) ...................................................................... 653

H8S/2225 数据表(PDF) 59 Page - Renesas Technology Corp

H8S/2225 数据表(HTML) 59 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载