H8SSLASH2225 datasheet(433/1071 Pages) RENESAS

433 / 1071 page

Section 10 I/O Ports

Rev. 5.00 Aug 08, 2006 page 347 of 982

REJ09B0054-0500

10.10.1 Port E Data Direction Register (PEDDR)

PEDDR specifies input or output of the port E pins using the individual bits. PEDDR cannot be

read; if it is, an undefined value will be read. This register is a write-only register, and cannot be

written by bit manipulation instruction. For details, see section 2.9.4, Access Methods for

Registers with Write-Only Bits.

Bit

Bit Name

Initial Value

R/W

Description

PE7DDR

PE6DDR

PE5DDR

PE4DDR

PE3DDR

PE2DDR

PE1DDR

PE0DDR

When a pin is specified as a general purpose I/O port,

setting this bit to 1 makes the corresponding port E

pin an output port. Clearing this bit to 0 makes the pin

an input port.

10.10.2 Port E Data Register (PEDR)

PEDR stores output data for port E pins.

Bit

Bit Name

Initial Value

R/W

Description

PE7DR

R/W

PE6DR

R/W

PE5DR

R/W

PE4DR

R/W

PE3DR

R/W

PE2DR

R/W

PE1DR

R/W

PE0DR

R/W

Output data for a pin is stored when the pin is

specified as a general purpose I/O port.

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