H8SSLASH2225 datasheet(564/1071 Pages) RENESAS

部件名	H8S/2225

功能描述	16-Bit Single-Chip Microcomputer H8S Family/H8S/2200 Series

PDF	1071 Pages

Scroll/Zoom	100%

制造商	RENESAS [Renesas Technology Corp]

网页	http://www.renesas.com

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564 / 1071 page

Section 13 Watchdog Timer (WDT)

Rev. 5.00 Aug 08, 2006 page 478 of 982

REJ09B0054-0500

When writing 0 to the WOVF bit

When writing to the RSTE and RSTS bits

Address:

H'A5

H'FF76

H'00

H'5A

H'FF76

Write data

Figure 13.7 Writing to RSTCSR

(3) Reading from TCNT, TCSR, and RSTCSR

These registers can be read in the same way normal registers are read. TCSR is allocated at

address H'FF74, TCNT at address H'FF75, and RSTCSR at address H'FF77.

13.6.2

Contention between Timer Counter (TCNT) Write and Increment

If a timer counter clock pulse is generated during the T2 state of a TCNT write cycle, the write

takes priority and the timer counter is not incremented. Figure 13.8 shows this operation.

Address

Internal write signal

TCNT input clock

TCNT

TCNT write cycle

Counter write data

Figure 13.8 Contention between TCNT Write and Increment

H8S/2225 数据表(PDF) 564 Page - Renesas Technology Corp