H8SSLASH2225 datasheet(656/1071 Pages) RENESAS

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Section 15 Serial Communication Interface (SCI)

Rev. 5.00 Aug 08, 2006 page 570 of 982

REJ09B0054-0500

15.3.8

Smart Card Mode Register (SCMR)

SCMR is a register that selects Smart Card interface mode and its transfer format.

Bit

Bit Name

Initial

Value

R/W

Description

7 to 4

—

All 1

—

Reserved

These bits are always read as 1, and cannot be

modified.

SDIR

R/W

Smart Card Data Transfer Direction

Selects the serial/parallel conversion format.

0: LSB-first in transfer

1: MSB-first in transfer

The bit setting is valid only when the transfer data

format is 8 bits. For 7-bit data, LSB-first is fixed.

SINV

R/W

Smart Card Data Invert

Specifies inversion of the data logic level. The

SINV bit does not affect the logic level of the parity

bit. To invert the parity bit, invert the O/

E bit in

SMR.

0: TDR contents are transmitted as they are.

Receive data is stored as it is in RDR

1: TDR contents are inverted before being

transmitted. Receive data is stored in inverted

form in RDR

1—

—

Reserved

This bit is always read as 1, and cannot be

modified.

SMIF

R/W

Smart Card Interface Mode Select

This bit is set to 1 to make the SCI operate in

Smart Card interface mode.

0: Normal asynchronous mode or clocked

synchronous mode

1: Smart card interface mode

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