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H8S/2225 数据表(PDF) 685 Page - Renesas Technology Corp |
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H8S/2225 数据表(HTML) 685 Page - Renesas Technology Corp |
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685 / 1071 page  Section 15 Serial Communication Interface (SCI) Rev. 5.00 Aug 08, 2006 page 599 of 982 REJ09B0054-0500 15.5.2 Multiprocessor Serial Data Reception Figure 15.16 shows a sample flowchart for multiprocessor serial data reception. If the MPIE bit in SCR is set to 1, data is skipped until data with a 1 multiprocessor bit is sent. On receiving data with a 1 multiprocessor bit, the receive data is transferred to RDR. An RXI interrupt request is generated at this time. All other SCI operations are the same as in asynchronous mode. Figure 15.15 shows an example of SCI operation for multiprocessor format reception. MPIE RDR value 0 D0 D1 D7 1 1 0 D0 D1 D7 0 1 1 1 Data (ID1) Start bit Multi- processor bit Multi- processor bit Multi- processor bit Multi- processor bit Stop bit Start bit Data (Data1) Stop bit Data (ID2) Start bit Stop bit Start bit Data (Data2) Stop bit RXI interrupt request (multiprocessor interrupt) generated Mark state (idle state) RDRF RDR data read and RDRF flag cleared to 0 in RXI interrupt service routine If not this station’s ID, MPIE bit is set to 1 again RXI interrupt request is not generated, and RDR retains its state ID1 (a) Data does not match station's ID MPIE RDR value 0 D0 D1 D7 1 1 0 D0 D1 D7 0 1 1 1 RXI interrupt request (multiprocessor interrupt) generated Mark state (idle state) RDRF RDR data read and RDRF flag cleared to 0 in RXI interrupt service routine Matches this station’s ID, so reception continues, and data is received in RXI interrupt service routine MPIE bit set to 1 again ID2 (b) Data matches station's ID Data2 ID1 MPIE = 0 MPIE = 0 Figure 15.15 Example of SCI Operation in Reception (Example with 8-Bit Data, Multiprocessor Bit, One Stop Bit) |
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