H8SSLASH2225 datasheet(697/1071 Pages) RENESAS

697 / 1071 page

Section 15 Serial Communication Interface (SCI)

Rev. 5.00 Aug 08, 2006 page 611 of 982

REJ09B0054-0500

When there is no parity error

Transmitting station output

When a parity error occurs

Transmitting station output

Receiving station

output

Start bit

Data bits

Parity bit

Error signal

Legend:

Ds:

D7 to D0:

Dp:

DE:

Figure 15.25 Normal Smart Card Interface Data Format

Data transfer with other types of IC cards (direct convention and inverse convention) are

performed as described in the following.

(Z)

State

Figure 15.26 Direct Convention (SDIR = SINV = O/

EEEE = 0)

With the direction convention type IC and the above sample start character, the logic 1 level

corresponds to state Z and the logic 0 level to state A, and transfer is performed in LSB-first order.

The start character data above is H'3B. For the direct convention type, clear the SDIR and SINV

bits in SCMR to 0. According to Smart Card regulations, clear the O/

E bit in SMR to 0 to select

even parity mode.

(Z)

State

Figure 15.27 Inverse Convention (SDIR = SINV = O/

EEEE = 1)

With the inverse convention type, the logic 1 level corresponds to state A and the logic 0 level to

state Z, and transfer is performed in MSB-first order. The start character data for the above is

H'3F. For the inverse convention type, set the SDIR and SINV bits in SCMR to 1. According to

Smart Card regulations, even parity mode is the logic 0 level of the parity bit, and corresponds to

H8S/2225 数据表(PDF) 697 Page - Renesas Technology Corp

H8S/2225 数据表(HTML) 697 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载