H8SSLASH2225 datasheet(817/1071 Pages) RENESAS

部件名	H8S/2225

功能描述	16-Bit Single-Chip Microcomputer H8S Family/H8S/2200 Series

PDF	1071 Pages

Scroll/Zoom	100%

制造商	RENESAS [Renesas Technology Corp]

网页	http://www.renesas.com

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817 / 1071 page

Section 20 Flash Memory (F-ZTAT Version)

Rev. 5.00 Aug 08, 2006 page 731 of 982

REJ09B0054-0500

20.5.6

Flash Memory Power Control Register (FLPWCR)

FLPWCR enables/disables transition to power-down modes for the flash memory when this LSI

enters sub-active mode.

Bit

Bit Name Initial Value R/W

Description

PDWND

R/W

Power Down Disable

Enables/disables transition to power-down modes for the

flash memory when this LSI enters sub-active mode.

0: Transition to power-down modes for the flash memory

enabled.

1: Transition to power-down modes for the flash memory

disabled.

6 to

—

All 0

Reserved

These bits are always read as 0.

20.5.7

Serial Control Register X (SCRX)

SCRX performs register access control.

Bit

Bit Name Initial Value R/W

Description

7—

R/W

Reserved

Only 0 should be written to this bit.

IICX1

IICX0

R/W

2C Transfer Select 1, 0

For details, see section 16.3.5, Serial Control Register X

(SCRX).

IICE

R/W

2C Master Enable

For details, see section 16.3.5, Serial Control Register X

(SCRX).

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