H8SSLASH2225 datasheet(833/1071 Pages) RENESAS

833 / 1071 page

Section 20 Flash Memory (F-ZTAT Version)

Rev. 5.00 Aug 08, 2006 page 747 of 982

REJ09B0054-0500

Do Not Set or Clear the SWE1 Bit during Execution of a Program in Flash Memory: Wait

for at least 100 µs after clearing the SWE1 bit before executing a program or reading data in flash

memory.

When the SWE1 bit is set, data in flash memory can be rewritten. Access flash memory only for

verify operations (verification during programming/erasing). Also, do not clear the SWE1 bit

during programming, erasing, or verifying. Similarly, when using the RAM emulation function

while a high level is being input to the FWE pin, the SWE1 bit must be cleared before executing a

program or reading data in flash memory.

However, the RAM area overlapping flash memory space can be read and written to regardless of

whether the SWE1 bit is set or cleared.

Do Not Use Interrupts while Flash Memory Is Being Programmed or Erased: All interrupt

requests, including NMI, should be disabled during FWE application to give priority to

program/erase operations.

Do Not Perform Additional Programming. Erase the Memory before Reprogramming: In

on-board programming, perform only one programming operation on a 128-byte programming

unit block. In programmer mode, too, perform only one programming operation on a 128-byte

programming unit block. Programming should be carried out with the entire programming unit

block erased.

Before Programming, Check That the Chip Is Correctly Mounted in the PROM

Programmer: Overcurrent damage to the device can result if the index marks on the PROM

programmer socket, socket adapter, and chip are not correctly aligned.

Do Not Touch the Socket Adapter or Chip during Programming: Touching either of these can

cause contact faults and write errors.

Reset the Flash Memory before Turning on the Power: To reset the flash memory during

oscillation stabilization period, the reset signal must be input for at least 100 µs.

Apply the Reset Signal while SWE Is Low to Reset the Flash Memory during its operation:

The reset signal is applied at least 100 µs after the SWE bit has been cleared.

H8S/2225 数据表(PDF) 833 Page - Renesas Technology Corp