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H8S/2225 数据表(PDF) 1001 Page - Renesas Technology Corp |
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H8S/2225 数据表(HTML) 1001 Page - Renesas Technology Corp |
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1001 / 1071 page ![]() Section 27 Electrical Characteristics Rev. 5.00 Aug 08, 2006 page 915 of 982 REJ09B0054-0500 Table 27.41 Bus Driving Characteristics Conditions: VCC = 2.7 V to 3.6 V, AVCC = 2.7 V to 3.6 V, Vref = 2.7 V to AVCC, VSS = AVSS = 0 V, Ta = –20°C to +75°C (regular specifications), Ta = –40°C to +85°C (wide-range specifications)*, Objective pins: SCL1 and 0 and SDA1 and 0 Item Symbol Min Typ Max Unit Test Conditions VT – VCC × 0.3 VVCC = 2.7 V to 3.6 V VT + VCC × 0.7 V VCC = 2.7 V to 3.6 V Schmitt trigger input voltage VT + – VT– VCC × 0.05 VVCC = 2.7 V to 3.6 V Input high voltage VIH VCC × 0.7 VCC + 0.5 V VCC = 2.7 V to 3.6 V Input low voltage VIL –0.5 VCC × 0.3 V VCC = 2.7 V to 3.6 V VOL 0.5 V IOL = 6 mA, VCC = 3.0 V to 3.6 V Output low voltage 0.4 V IOL = 3 mA Input capacitance Cin 20 pF Vin = 0 V f = 1 MHz Ta = 25 °C Three states leakage current (off) | ITSI | 1.0 µA Vin = 0.5 V to VCC – 0.5 V SCL, SDA output falling time tof 20 + 0.1 Cb 250 ns VCC = 2.7 V to 3.6 V Note: * If the A/D or D/A converter is not used, the AVCC, Vref, and AVSS pins should not be open. Even if the A/D or D/A converter is not used, connect the AVCC and Vref pins to VCC and supply 2.0 V to 3.6 V. In this case, Vref ≤ AVCC. 27.5.3 AC Characteristics Figure 27.8 shows the test conditions for the AC characteristics. (1) Clock Timing Table 27.42 lists the clock timing. |
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