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SH7708 数据表(PDF) 136 Page - Renesas Technology Corp |
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SH7708 数据表(HTML) 136 Page - Renesas Technology Corp |
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136 / 633 page ![]() 118 Program execution state No Yes No Yes No Yes No No Yes Yes No Yes No No Yes No Yes IRQOUT = low Save SR to SSR; save PC to SPC Set interrupt cause in INTEVT Set BL/MD/RB bits in SR to 1 Branch to exception handler Interrupt generated? (SR. BL = 0) or (sleep or standby mode)? NMI? Level 14 interrupt? Level 1 interrupt? I3–I0 level 13 or lower? I3–I0 level 0? Yes Level 15 interrupt? I3–I0 level 14 or lower? I3–I0: Interrupt mask bits in status register (SR) Figure 6.3 Interrupt Operation Flowchart |
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