SH7708 datasheet(179/633 Pages) RENESAS

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9.2.2

CPG Pin Configuration

Table 9.1 lists the CPG pins and their functions.

Table 9.1

Clock Pulse Generator Pins and Functions

Pin Name

Symbol

I/O

Description

Mode control

MD0

Set the clock operating mode.

pins

MD1

MD2

Crystal I/O pins

XTAL

Connects a crystal oscillator.

(clock input pins)

EXTAL

Connects a crystal oscillator. Also used to input an external

clock.

Clock I/O pin

CKIO

I/O

Inputs or outputs an external clock. Level can be fixed during

output.

Capacitor

connection pins

CAP1

Connects capacitor for PLL circuit 1 operation (recommended

value 470 pF).

for PLL

CAP2

Connects capacitor for PLL circuit 2 operation (recommended

value 470 pF).

9.2.3

CPG Register Configuration

Table 9.2 shows the CPG register configuration.

Table 9.2

Abbreviation

R/W

Initial

Value*

Address

Access Size

Frequency control register

FRQCR

R/W

H'0102

H'FFFFFF80

Note: * Initialized by a power-on reset via the RESET pin. Register contents are retained in a

power-on reset initiated by the WDT.

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