SH7708 datasheet(234/633 Pages) RENESAS

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Bit 1—Refresh Mode (RMODE): Selects the refresh mode for the DRAM connected to area 2.

Bit 1: RMODE

Description

CAS-before-RAS refresh (RFSH must be 1)

(Initial value)

Self-refresh (RFSH must be 1)

10.2.7

PCMCIA Control Register (PCR)

The PCMCIA control register (PCR) is a 16-bit read/write register that specifies the

OE and WE

signal assert/negate timing for PCMCIA interfaces connected to areas 5 and 6. The

OE and WE

signal assert pulse widths are designated by the WCR2 wait control bits. This register is initialized

to H'0000 by a power-on reset, but is not initialized by a manual reset or in standby mode, and

retains its contents.

Bit:

Bit name:

—

Initial value:

R/W:

Bit:

Bit name: A5TED1 A5TED0 A6TED1 A6TED0 A5TEH1 A5TEH0 A6TEH1 A6TEH0

Initial value:

R/W:

R/W

Bits 15 to 8—Reserved: These bits always read 0. The write value should always be 0.

Bits 7 and 6—Area 5 Address

OE/WE Assert Delay (A5TED1, A5TED0): These bits specify the

address to

OE/WE assert delay time for the PCMCIA interface connected to area 5.

Bit 7: A5TED1

Bit 6: A5TED0

Description

0.5 cycle delay

(Initial value)

1.5 cycle delay

2.5 cycle delay

3.5 cycle delay

SH7708 数据表(PDF) 234 Page - Renesas Technology Corp

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