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H8/3003 数据表(PDF) 551 Page - Renesas Technology Corp |
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H8/3003 数据表(HTML) 551 Page - Renesas Technology Corp |
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551 / 715 page  Table 18-6 Control Signal Timing Condition A: VCC = 2.7 V to 5.5 V, AVCC = 2.7 V to 5.5 V, VREF = 2.7 V to AVCC, VSS = AVSS = 0 V, ø = 2 MHz to 8 MHz, Ta = –20°C to +75°C (regular specifications), Ta = –40°C to +85°C (wide-range specifications) Condition B: VCC = 3.0 V to 5.5 V, AVCC = 3.0 V to 5.5 V, VREF = 3.0 V to AVCC, VSS = AVSS = 0 V, ø = 2 MHz to 10 MHz, Ta = –20°C to +75°C (regular specifications), Ta = –40°C to +85°C (wide-range specifications) Condition C: VCC = 5.0 V ± 10%, AVCC = 5.0 V ± 10%, VREF = 4.5 V to AVCC, VSS = AVSS = 0 V, ø = 2 MHz to 16 MHz, Ta = –20°C to +75°C (regular specifications), Ta = –40°C to +85°C (wide-range specifications) Condition A Condition B Condition C 8 MHz 10 MHz 16 MHz Item Symbol Min Max Min Max Min Max Unit RES setup time t RESS 200 — 200 — 200 — ns Figure 18-15 RES pulse width t RESW 10 — 10 — 10 — tCYC RESO output delay t RESD — 100 — 100 — 100 ns Figure 18-16 time RESO output pulse t RESOW 132 — 132 — 132 — tCYC width NMI setup time t NMIS 150 — 150 — 150 — ns Figure 18-17 (NMI, IRQ7 to IRQ0) NMI hold time t NMIH 10 — 10 — 10 — (NMI, IRQ7 to IRQ0) Interrupt pulse width t NMIW 200 — 200 — 200 — (NMI, IRQ2 to IRQ0 when exiting software standby mode) Clock oscillator settling t OSC1 20 — 20 — 20 — ms Figure 18-19 time at reset (crystal) Clock oscillator settling t OSC2 8 — 8 — 8 — Figure 17-1 time in software standby (crystal) Test Conditions 533 |
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