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H8/3003 数据表(PDF) 103 Page - Renesas Technology Corp |
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H8/3003 数据表(HTML) 103 Page - Renesas Technology Corp |
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103 / 715 page ![]() 5.2.4 IRQ Enable Register (IER) IER is an 8-bit readable/writable register that enables or disables IRQ0 to IRQ7 interrupt requests. IER is initialized to H'00 by a reset and in hardware standby mode. Bits 7 to 0—IRQ7 to IRQ0 Enable (IRQ7E to IRQ0E): These bits enable or disable IRQ7 to IRQ0 interrupts. Bits 7 to 0 IRQ7E to IRQ0E Description 0 IRQ7 to IRQ0 interrupts are disabled (Initial value) 1 IRQ7 to IRQ0 interrupts are enabled Bit Initial value Read/Write 7 IRQ7E 0 R/W These bits enable or disable IRQ to IRQ interrupts 6 IRQ6E 0 R/W 5 IRQ5E 0 R/W 4 IRQ4E 0 R/W 3 IRQ3E 0 R/W 2 IRQ2E 0 R/W 1 IRQ1E 0 R/W 0 IRQ0E 0 R/W 70 IRQ to IRQ enable 70 85 |
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