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H8/3003 数据表(PDF) 104 Page - Renesas Technology Corp |
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H8/3003 数据表(HTML) 104 Page - Renesas Technology Corp |
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104 / 715 page ![]() 5.2.5 IRQ Sense Control Register (ISCR) ISCR is an 8-bit readable/writable register that selects level sensing or falling-edge sensing of the inputs at pins IRQ7 to IRQ0. ISCR is initialized to H'00 by a reset and in hardware standby mode. Bits 7 to 0—IRQ7 to IRQ0 Sense Control (IRQ7SC to IRQ0SC): These bits selects whether interrupts IRQ7 to IRQ0 are requested by level sensing of pins IRQ7 to IRQ0, or by falling-edge sensing. Bits 7 to 0 IRQ7SC to IRQ0SC Description 0 Interrupts are requested when IRQ7 to IRQ0 inputs are low (Initial value) 1 Interrupts are requested by falling-edge input at IRQ7 to IRQ0 Bit Initial value Read/Write 7 IRQ7SC 0 R/W These bits select level sensing or falling-edge sensing for IRQ to IRQ interrupts 6 IRQ6SC 0 R/W 5 IRQ5SC 0 R/W 4 IRQ4SC 0 R/W 3 IRQ3SC 0 R/W 2 IRQ2SC 0 R/W 1 IRQ1SC 0 R/W 0 IRQ0SC 0 R/W 70 IRQ to IRQ sense control 70 86 |
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