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H8/3003 数据表(PDF) 158 Page - Renesas Technology Corp |
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H8/3003 数据表(HTML) 158 Page - Renesas Technology Corp |
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158 / 715 page ![]() Bit 4—Strobe Mode Select (CAS/ WE): Selects 2CAS or 2WE mode. The setting of this bit is valid when PSRAME = 0 and DRAME = 1. This bit is write-disabled when the PSRAME or DRAME bit is set to 1. Bit 4 CAS/ WE Description 02 WE mode (Initial value) 12 CAS mode Bit 3—Address Multiplex Mode Select (M9/ M8): Selects 8-bit or 9-bit column addressing. The setting of this bit is valid when PSRAME = 0 and DRAME = 1. This bit is write-disabled when the PSRAME or DRAME bit is set to 1. Bit 3 M9/ M8 Description 0 8-bit column address mode (Initial value) 1 9-bit column address mode Bit 2—Refresh Pin Enable (RFSHE): Enables or disables refresh signal output from the RFSH pin. This bit is write-disabled when the PSRAME or DRAME bit is set to 1. Bit 2 RFSHE Description 0 Refresh signal output at the RFSH pin is disabled (Initial value) (the RFSH pin can be used as a generic input/output port) 1 Refresh signal output at the RFSH pin is enabled Bit 1—Reserved: Read-only bit, always read as 1. Bit 0—Refresh Cycle Enable (RCYCE): Enables or disables insertion of refresh cycles. The setting of this bit is valid when PSRAME = 1 or DRAME = 1. When PSRAME = 0 and DRAME = 0, refresh cycles are not inserted regardless of the setting of this bit. Bit 0 RCYCE Description 0 Refresh cycles are disabled (Initial value) 1 Refresh cycles are enabled for area 3 140 |
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