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H8/3003 数据表(PDF) 310 Page - Renesas Technology Corp |
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H8/3003 数据表(HTML) 310 Page - Renesas Technology Corp |
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310 / 715 page ![]() Table 10-3 ITU Registers (cont) Abbre- Initial Channel Address*1 Name viation R/W Value 4 H'FF92 Timer control register 4 TCR4 R/W H'80 H'FF93 Timer I/O control register 4 TIOR4 R/W H'88 H'FF94 Timer interrupt enable register 4 TIER4 R/W H'F8 H'FF95 Timer status register 4 TSR4 R/(W)*2 H'F8 H'FF96 Timer counter 4 (high) TCNT4H R/W H'00 H'FF97 Timer counter 4 (low) TCNT4L R/W H'00 H'FF98 General register A4 (high) GRA4H R/W H'FF H'FF99 General register A4 (low) GRA4L R/W H'FF H'FF9A General register B4 (high) GRB4H R/W H'FF H'FF9B General register B4 (low) GRB4L R/W H'FF H'FF9C Buffer register A4 (high) BRA4H R/W H'FF H'FF9D Buffer register A4 (low) BRA4L R/W H'FF H'FF9E Buffer register B4 (high) BRB4H R/W H'FF H'FF9F Buffer register B4 (low) BRB4L R/W H'FF Notes: 1. The lower 16 bits of the address are indicated. 2. Only 0 can be written, to clear flags. 292 |
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