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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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H8/3003 数据表(PDF) 320 Page - Renesas Technology Corp |
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H8/3003 数据表(HTML) 320 Page - Renesas Technology Corp |
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320 / 715 page  Bit 5—Master Enable TOCXB4 (EXB4): Enables or disables ITU output at pin TOCXB4. Bit 5 EXB4 Description 0 TOCXB4 output is disabled regardless of TFCR settings (TOCXB4 operates as a generic input/output pin). If XTGD = 0, EXB4 is cleared to 0 when input capture A occurs in channel 1. 1 TOCXB4 is enabled for output according to TFCR settings (Initial value) Bit 4—Master Enable TOCXA4 (EXA4): Enables or disables ITU output at pin TOCXA4. Bit 4 EXA4 Description 0 TOCXA4 output is disabled regardless of TFCR settings (TOCXA4 operates as a generic input/output pin). If XTGD = 0, EXA4 is cleared to 0 when input capture A occurs in channel 1. 1 TOCXA4 is enabled for output according to TFCR settings (Initial value) Bit 3—Master Enable TIOCB3 (EB3): Enables or disables ITU output at pin TIOCB3. Bit 3 EB3 Description 0 TIOCB3 output is disabled regardless of TIOR3 and TFCR settings (TIOCB3 operates as a generic input/output pin). If XTGD = 0, EB3 is cleared to 0 when input capture A occurs in channel 1. 1 TIOCB3 is enabled for output according to TIOR3 and TFCR settings (Initial value) 302 |
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