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FS401LF 数据表(PDF) 12 Page - List of Unclassifed Manufacturers |
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FS401LF 数据表(HTML) 12 Page - List of Unclassifed Manufacturers |
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12 / 104 page  FS401, FS403 PRODUCT SPECIFICATION REV. NO. 1.7 12 JANUARY 24, 2007 COPYRIGHT © 1999 FOCUS ENHANCEMENTS, INC. 3. Pin Descriptions Pin Name Pin Number FS401/FS403 Type/Value Pin Function Description Clocks OSC1 2/1 TTL input Oscillator Number 1. Default clock input to the encoder. Input from an external oscillator; or one pin of a crystal connected between OSC1 and OSC1BUF. NTSC subcarrier frequency can be derived from this 4fSC clock. OSC1 must be connected (see Table 4. Clock Connections). OSC1BUF 3/2 LVTTL output Oscillator 1 Buffer. If a crystal is used, one pin is connected to OSC1, the other to OSC1BUF. Float this pin if OSC1 is connected to an oscillator. OSC2 4/3 TTL input Oscillator Number 2. Input from an external oscillator; or one pin of a crystal connected between OSC2 and OSC2BUF. PAL subcarrier frequency can be derived from this 4fSC clock. Ground if unused. OSC2BUF 5/4 LVTTL output Oscillator 2 Buffer. If a crystal is used, one pin is connected to OSC2, the other to OSC2BUF. Float this pin if unused. HS_IN 50/63 TTL input VGA Horizontal Sync Input. Active HIGH or active LOW polarity is sensed. VS_IN 49/62 TTL input VGA Vertical Sync Input. Active HIGH or active LOW polarity is sensed. Global Controls INTCPUEN 59/77 TTL input Internal CPU enable. INTCPUEN enables the internal CPU when high. FLP_RST 403 only x/35 TTL input Field, Line and Pixel Reset. Resets video encoder engine to the start location on the outgoing frame. Used for genlock. Active high. RESET 30/37 TTL input Reset. Resets internal state machines and initializes default register values. Active high. A/D Converter Interface R_IN, G_IN, B_IN 36/45, 39/48, 44/53 700 or 1000 mV Analog red, blue and green inputs. AC coupled RGB video input signals. Nominal voltage range is 0.7 or 1.0 Volt peak-to-peak (selectable). Inputs are clamped to ground when HS_IN is active. VADCREF 42/51 700 or 1000 mV A/D Converter Top Reference Voltage Input. Input to voltage follower that supplies current to A/D converter reference resistors. Range is 0.5 - 2.0 volts. VTOUT 41/50 700 or 1000 mV A/D Converter Top Reference Voltage Output. Output of the internal VT buffer and direct connection to the A/D reference resistor ladder. If an external A/D voltage is used, it must be capable of driving the 100 Ω load of the ladder. If the internal reference is used, it must be connected to an external 0.1 µF de-coupling capacitor. VGACLKIN 53/67 TTL input A/D VGA converter clock input. Analog-to-digital converter external clock input if EXTVGASEL\ = L. EXTVGASEL\ 52/66 TTL input A/D VGA clock select. Selects the A/D clock source: EXTVGASEL\ = H: internal phase-locked loop; EXTVGASEL\ = L: external clock applied to VGACLKIN. |
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