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FS401LF 数据表(PDF) 32 Page - List of Unclassifed Manufacturers |
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FS401LF 数据表(HTML) 32 Page - List of Unclassifed Manufacturers |
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32 / 104 page ![]() FS401, FS403 PRODUCT SPECIFICATION REV. NO. 1.7 32 JANUARY 24, 2007 COPYRIGHT © 1999 FOCUS ENHANCEMENTS, INC. 4.5.5 IHS - Input Horizontal Samples Input Horizontal Samples Low (8) 7 6 5 4 3 2 1 0 IHS7 IHS6 IHS5 IHS4 IHS3 IHS2 IHS1 IHS0 Input Horizontal Samples High (9) 7 6 5 4 3 2 1 0 0 0 0 0 0 IHS10 IHS9 IHS8 Register Bit# Name Description 9, 8 2-0, 7-0 IHS10-0 Input horizontal line samples bits [10:0]. Terminal count of the number of clocks per horizontal line between incoming horizontal sync pulses. Internal ADCK phase-locked loop is programmed with this value. Range: 16MHz ≤ IHS*Incoming Horizontal Line Frequency ≤ 50MHz |
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