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FS401LF 数据表(PDF) 55 Page - List of Unclassifed Manufacturers

部件名 FS401LF
功能描述  PC to TV Video Scan Converters
PDF  104 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  ETC2 [List of Unclassifed Manufacturers]
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标志 ETC2 - List of Unclassifed Manufacturers

FS401LF 数据表(HTML) 55 Page - List of Unclassifed Manufacturers

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FS401, FS403
PRODUCT SPECIFICATION
REV. NO. 1.7
55
JANUARY 24, 2007
COPYRIGHT
© 1999 FOCUS ENHANCEMENTS, INC.
4.5.27 SSR – Software Status Register
Software Status Register Low (62)
7
6
5
4
3
2
1
0
0
HSYNCACT
VSYNCACT
ICALAQRD
MCC
MCS
ERROR
READY
Software Status Register High (63)
7
6
5
4
3
2
1
0
CHKSUM7
CHKSUM6
CHKSUM5
CHKSUM4
CHKSUM3
CHKSUM2
CHKSUM1
CHKSUM0
Reg
Bit#
Bit Name
Description
62
0
READY
0: Internal controller is initializing after reset
1: Internal controller is ready
62
1
ERROR
0: The video mode parameters are all within range
1: A video mode parameter is out of range and the mode cannot be
calculated. The following conditions cause an error:
IHC < 32
IVC < 32
HAT < 20%
VAT < 20%
TVP < 128
TVL < 128
62
2
MCS
Mode Change Start
0: Video mode change is not in progress.
1: Video mode change is in progress.
The internal micro-controller sets this bit to 1 after it detects a change
in the size or speed of the input video mode. The controller clears this
bit after it has completed the calculations for the new mode.
62
3
MCC
Mode Change Complete
0: Video mode change is not complete
1: Video mode change is complete
NOTE: This bit is set when a mode change is complete and cleared by
writing a 1 to the CLRMCC bit in the SCR
62
4
ICALAQRD
Input Calibration Acquired
0: The internal micro-controller has not yet read an acceptable set of
values from the SHV, EHV, SVV, and EVV registers and is using the
default values for HAT, SHV, VAT, and SVV.
1: The internal micro-controller has read acceptable input calibration
values and is using them.
62
5
VSYNCSACT
0: No VSync activity during last 100ms interval.
1: VSync activity during last 100ms interval was detected.
62
6
HSYNCACT
0: No HSync activity during last 100ms interval.
1: HSync activity during last 100ms interval was detected.
63
7-0
CHKSUM7-0
Internal micro-controller ROM and RAM checksum.
NOTE: The checksum for version 30 is 0xAF.
NOTE: It is possible to write to this register, however doing so will produce unpredictable results.



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