FS401LF datasheet(20/104 Pages) ETC2

20 / 104 page

FS401, FS403

PRODUCT SPECIFICATION

REV. NO. 1.7

JANUARY 24, 2007

4.2.1.3 Input Calibration Tables

The internal micro-controller can store input calibration information for four video modes when in both

manual and auto input calibration mode. Setting the ENICTBL bit in the SCR register enables this

feature.

During a video mode change, the internal micro-controller will save the accumulated input calibration of

the last video mode and its IVC and IHC values into the input calibration table. Next, the internal micro-

controller will search the table entries for an entry that match the IHC and IVC of the new mode. If a

match is found, then the input calibration information is retrieved from the table.

Setting the RSTICAL bit in the SCR register will clear the table entry for the current mode.

The input calibration table can be read and modified by accessing the following configuration values via

the CCR and CDR registers.

CCR_ICAL_TABLE_x_IVC

CCR_ICAL_TABLE_x_IHC

CCR_ICAL_TABLE_x_HAT

CCR_ICAL_TABLE_x_SHV

CCR_ICAL_TABLE_x_VAT

CCR_ICAL_TABLE_x_SVV

x = 0, 1, 2, or 3

4.2.2 Output Calibration

The internal micro-controller needs to know the location of the first displayable pixel and line and how

many pixels and lines the output device can display. This information is referred to as the Output

Calibration.

The internal micro-controller has built-in default output calibration that works well for supported output

devices. However, an external controller can change the output calibration to suit a specific output

device.

The starting pixel and starting line locations are stored in HOHOS and HOVOS. The external controller

may read and write these registers at any time. Any changes will take effect upon the next output frame.

The number of pixels and lines that can be displayed are stored in the TVP (TV Pixels) and TVL (TV

Lines) registers. The external controller may read and write these registers at any time. Any changes will

take effect after the internal controller recalculates the low level registers.

Additionally, the FS400 is capable of display a 75% color bar pattern to assist the user in manually

adjusting the output calibration. Setting the OCAL bit in the SCR register enables the 75% color bar

pattern.

Any change to TV_CLK, PROG_INT, or PAL_NTSC fields of the HCRS register causes the internal

micro-controller to initialize the HOHOS, HOVOS, TVL, and TVP registers to defaults appropriate to the

new output mode.

4.2.3 Zoom

There are two zooming methods. The first is to set the ZOOM bit in the HCRES register for 2x-zoom.

The second is to use the HSS (Horizontal Scale Step) and the VSS (Vertical Scale Step) registers for

variable zoom.

Setting the ZOOM bit in the HCRES register causes the pixels to double in size. The HPP (Horizontal

Pan Position) and the VPP (Vertical Pan Position) are used to pan the zoomed image.

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