FS401LF datasheet(21/104 Pages) ETC2

21 / 104 page

FS401, FS403

PRODUCT SPECIFICATION

REV. NO. 1.7

JANUARY 24, 2007

The pixels double in size in the vertical direction. The internal micro-controller also attempts to double

pixels in the horizontal direction. This is possible for most video modes; however, with very large input

images and very small output devices the pixels will be scaled to something less than 2x horizontally.

The HSS (Horizontal Scale Step) and the VSS (Vertical Scale Step) registers can be used to scale the

image up or down (larger or smaller). This method allows for a variable zoom that works independently in

the horizontal and vertical directions. The HPO (Horizontal Position Offset) and the VPO (Vertical

Position Offset) are used to pan the variable zoomed image.

The ZOOM bit and the HSS and VSS register pair effects are mutually exclusive. They do not compound

each other. The ZOOM bit is the highest priority. If the ZOOM bit is set, then the image is in the 2x-zoom

mode, regardless of the state of HSS and VSS. When the ZOOM bit is cleared, HSS and VSS control the

zoom effect.

The minimum and maximum values of HSS and VSS vary depending upon the size of the input image

and the size of the output device. The internal micro-controller checks the limits of these registers each

time they change. If the values in the HSS and VSS registers are out of range, the internal micro-

controller will overwrite the register with either the minimum value or the maximum value. However, it

can take up to 25ms before the internal micro-controller does this. Therefore, an external controller

should not read HSS or VSS until 25ms after writing to one of these registers.

4.2.4 Panning

When the ZOOM bit in the HCRES register is cleared HPO (Horizontal Position Offset) and VPO (Vertical

Position Offset) control panning. HPP (Horizontal Pan Position) and VPP (Vertical Pan Position) control

panning when the ZOOM bit in the HCRES register is set.

The HPP and HPO values are expressed as a signed ratio of the horizontal total * 32768. The VPP and

VPO values are expressed as a signed ratio of the vertical total * 32768. These signed ratios are added

to the start of active video ratios (SHV and SVV) to compute a new start of active video.

The CCR_HPO_STEP and CCR_VPO_STEP configuration values contain the percentage of the

horizontal and vertical totals that represent one pixel. The processor can read CCR_HPO_STEP and

add or subtract the value from HPO or HPP to move the image one pixel horizontally. The

CCR_VPO_STEP value is added or subtracted from the VPO and VPP to move the image one pixel

vertically.

The minimum and maximum values of HPO, VPO, HPP and VPP vary depending upon the size of the

input image. The internal micro-controller checks the limits of these values each time they change. If the

values in the HPO, VPO, HPP and VPP registers are out of range, the internal micro-controller will

overwrite the register with either the minimum value or the maximum value. However, it can take up to

25ms before the internal micro-controller does this. Therefore, an external controller should not read

HPO, VPO, HPP or VPP until 25ms after writing to one of these registers.

4.2.5 Picture Control

The following registers control the picture quality.

CON

Contrast Coefficient

BRT

Brightness Coefficient

SHP

Sharpness Coefficient

CSC

Color Saturation Coefficient

CON, BRT, SHP, and CSC are low level hardware registers. However, the internal micro-controller does

not modify the contents of these registers. An external controller is free to modify them as needed.

Additionally, there are several bits in the control registers that are used to control picture quality.

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